| Message ID | 20241212151412.570454-12-mark.cave-ayland@ilande.co.uk (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | target/ppc: implement legacy address-swizzling MSR_LE support | expand |
diff --git a/target/ppc/translate.c b/target/ppc/translate.c index e8ae96cd46..4a0be4d70c 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -6664,7 +6664,8 @@ static void ppc_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) ctx->access_type = -1; ctx->need_access_type = !mmu_is_64bit(env->mmu_model); ctx->le_mode = (hflags >> HFLAGS_LE) & 1; - ctx->default_tcg_memop_mask = ctx->le_mode ? MO_LE : MO_BE; + ctx->default_tcg_memop_mask = (!need_addrswizzle_le(ctx) && + ctx->le_mode) ? MO_LE : MO_BE; ctx->flags = env->flags; #if defined(TARGET_PPC64) ctx->excp_model = env->excp_model;
If address swizzling is enabled for little endian accesses, don't use little endian memory ordering. This is because the conversion is performed by swizzling the physical address lines as opposed to reversing the memory storage order. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> --- target/ppc/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)