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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f142daeed8sm1740256a91.16.2024.12.12.10.54.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 12 Dec 2024 10:54:58 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= Subject: [PATCH 06/18] accel/tcg: Move page_[un]protect() to 'user/page-protection.h' Date: Thu, 12 Dec 2024 19:53:29 +0100 Message-ID: <20241212185341.2857-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241212185341.2857-1-philmd@linaro.org> References: <20241212185341.2857-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=philmd@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier --- accel/tcg/internal-target.h | 1 + include/exec/translate-all.h | 5 ----- include/user/page-protection.h | 20 ++++++++++++++++++++ accel/tcg/user-exec.c | 2 +- linux-user/elfload.c | 2 +- 5 files changed, 23 insertions(+), 7 deletions(-) create mode 100644 include/user/page-protection.h diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h index fe109724c68..a03c05315a4 100644 --- a/accel/tcg/internal-target.h +++ b/accel/tcg/internal-target.h @@ -37,6 +37,7 @@ void page_table_config_init(void); #endif #ifdef CONFIG_USER_ONLY +#include "user/page-protection.h" /* * For user-only, page_protect sets the page read-only. * Since most execution is already on read-only pages, and we'd need to diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h index c50661a05d5..039668ff8ac 100644 --- a/include/exec/translate-all.h +++ b/include/exec/translate-all.h @@ -25,9 +25,4 @@ /* translate-all.c */ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); -#ifdef CONFIG_USER_ONLY -void page_protect(tb_page_addr_t page_addr); -int page_unprotect(tb_page_addr_t address, uintptr_t pc); -#endif - #endif /* TRANSLATE_ALL_H */ diff --git a/include/user/page-protection.h b/include/user/page-protection.h new file mode 100644 index 00000000000..448c7a03449 --- /dev/null +++ b/include/user/page-protection.h @@ -0,0 +1,20 @@ +/* + * QEMU page protection declarations. + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ +#ifndef USER_PAGE_PROTECTION_H +#define USER_PAGE_PROTECTION_H + +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + +#include "exec/translation-block.h" + +void page_protect(tb_page_addr_t page_addr); +int page_unprotect(tb_page_addr_t address, uintptr_t pc); + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 4ed6dd19f30..636932303bb 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -25,7 +25,7 @@ #include "qemu/rcu.h" #include "exec/cpu_ldst.h" #include "qemu/main-loop.h" -#include "exec/translate-all.h" +#include "user/page-protection.h" #include "exec/page-protection.h" #include "exec/helper-proto.h" #include "qemu/atomic128.h" diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 471a384b222..521fdde0aa2 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -3918,7 +3918,7 @@ int load_elf_binary(struct linux_binprm *bprm, struct image_info *info) } #ifdef USE_ELF_CORE_DUMP -#include "exec/translate-all.h" +#include "user/page-protection.h" /* * Definitions to generate Intel SVR4-like core files.