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[109.42.49.90]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aac0e895194sm1329218666b.70.2024.12.28.23.27.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 Dec 2024 23:27:21 -0800 (PST) From: Thomas Huth To: Stefan Hajnoczi , qemu-devel@nongnu.org Subject: [PULL 24/35] next-cube: use named gpio to set RTC data bit in scr2 Date: Sun, 29 Dec 2024 08:25:15 +0100 Message-ID: <20241229072526.166555-25-huth@tuxfamily.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241229072526.166555-1-huth@tuxfamily.org> References: <20241229072526.166555-1-huth@tuxfamily.org> MIME-Version: 1.0 Received-SPF: pass client-ip=209.85.208.48; envelope-from=th.huth@gmail.com; helo=mail-ed1-f48.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, FREEMAIL_FORGED_FROMDOMAIN=0.001, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.156, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mark Cave-Ayland This is in preparation for moving NeXTRTC to its own separate device. Signed-off-by: Mark Cave-Ayland Reviewed-by: Thomas Huth Message-ID: <20241222130012.1013374-23-mark.cave-ayland@ilande.co.uk> Signed-off-by: Thomas Huth --- hw/m68k/next-cube.c | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index a39117144c..1e9e662b40 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -240,10 +240,13 @@ static void next_scr2_rtc_update(NeXTPC *s) ((scr2_2 & SCR2_RTDATA) ? 1 : 0); } else { /* Shift out value to read */ + qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named( + DEVICE(s), "pc-rtc-data-in", 0); + if (rtc->retval & (0x80 >> (rtc->phase - 8))) { - scr2_2 |= SCR2_RTDATA; + qemu_irq_raise(rtc_data_in_irq); } else { - scr2_2 &= ~SCR2_RTDATA; + qemu_irq_lower(rtc_data_in_irq); } } } @@ -270,8 +273,6 @@ static void next_scr2_rtc_update(NeXTPC *s) rtc->command = 0; rtc->value = 0; } - - s->scr2 = deposit32(s->scr2, 8, 8, scr2_2); } static uint64_t next_mmio_read(void *opaque, hwaddr addr, unsigned size) @@ -1001,6 +1002,20 @@ static const MemoryRegionOps next_dummy_en_ops = { .endianness = DEVICE_BIG_ENDIAN, }; +static void next_pc_rtc_data_in_irq(void *opaque, int n, int level) +{ + NeXTPC *s = NEXT_PC(opaque); + uint8_t scr2_2 = extract32(s->scr2, 8, 8); + + if (level) { + scr2_2 |= SCR2_RTDATA; + } else { + scr2_2 &= ~SCR2_RTDATA; + } + + s->scr2 = deposit32(s->scr2, 8, 8, scr2_2); +} + static void next_pc_reset_hold(Object *obj, ResetType type) { NeXTPC *s = NEXT_PC(obj); @@ -1087,6 +1102,8 @@ static void next_pc_init(Object *obj) sysbus_init_mmio(sbd, &s->timer_mem); s->rtc_power_irq = qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I); + qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq, + "pc-rtc-data-in", 1); } /*