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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656af6d02sm618987535e9.1.2025.01.06.12.03.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 06 Jan 2025 12:03:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , =?utf-8?b?RnLDqWQ=?= =?utf-8?b?w6lyaWMgQmFycmF0?= , Stefano Stabellini , Ilya Leoshkevich , Cameron Esfahani , Paolo Bonzini , kvm@vger.kernel.org, Alexander Graf , Paul Durrant , David Hildenbrand , Halil Pasic , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Marcel Apfelbaum , xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Yanan Wang , Reinoud Zandijk , Peter Maydell , qemu-s390x@nongnu.org, Riku Voipio , Anthony PERARD , Alistair Francis , Sunil Muthuswamy , Christian Borntraeger , Nicholas Piggin , Richard Henderson , Marcelo Tosatti , Thomas Huth , Roman Bolshakov , "Edgar E . Iglesias" , Zhao Liu , Phil Dennis-Jordan , David Woodhouse , Harsh Prateek Bora , Nina Schoetterl-Glausch , "Edgar E. Iglesias" , Eduardo Habkost , qemu-ppc@nongnu.org, Daniel Henrique Barboza , "Michael S. Tsirkin" , Anton Johansson Subject: [RFC PATCH 5/7] accel/hw: Implement hw_accel_get_cpus_queue() Date: Mon, 6 Jan 2025 21:02:56 +0100 Message-ID: <20250106200258.37008-6-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250106200258.37008-1-philmd@linaro.org> References: <20250106200258.37008-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We can only run a single hardware accelerator at a time, so add a generic hw_accel_get_cpus_queue() helper in accel-system.c, a file common to all HW accelerators. Register AccelOpsClass::get_cpus_queue() for each HW accelerator. Add a generic CPU_FOREACH_HWACCEL() macro. Signed-off-by: Philippe Mathieu-Daudé --- include/system/hw_accel.h | 9 +++++++++ accel/accel-system.c | 8 ++++++++ accel/kvm/kvm-accel-ops.c | 1 + accel/xen/xen-all.c | 1 + target/i386/nvmm/nvmm-accel-ops.c | 1 + target/i386/whpx/whpx-accel-ops.c | 1 + 6 files changed, 21 insertions(+) diff --git a/include/system/hw_accel.h b/include/system/hw_accel.h index 380e9e640b6..12664cac6f9 100644 --- a/include/system/hw_accel.h +++ b/include/system/hw_accel.h @@ -2,6 +2,7 @@ * QEMU Hardware accelerators support * * Copyright 2016 Google, Inc. + * Copyright 2025 Linaro Ltd. * * This work is licensed under the terms of the GNU GPL, version 2 or later. * See the COPYING file in the top-level directory. @@ -17,6 +18,14 @@ #include "system/whpx.h" #include "system/nvmm.h" +/* Guard with qemu_cpu_list_lock */ +extern CPUTailQ hw_accel_cpus_queue; + +#define CPU_FOREACH_HWACCEL(cpu) \ + QTAILQ_FOREACH_RCU(cpu, &hw_accel_cpus_queue, node) + +CPUTailQ *hw_accel_get_cpus_queue(void); + void cpu_synchronize_state(CPUState *cpu); void cpu_synchronize_post_reset(CPUState *cpu); void cpu_synchronize_post_init(CPUState *cpu); diff --git a/accel/accel-system.c b/accel/accel-system.c index a7596aef59d..60877ea7a28 100644 --- a/accel/accel-system.c +++ b/accel/accel-system.c @@ -27,9 +27,17 @@ #include "qemu/accel.h" #include "hw/boards.h" #include "system/cpus.h" +#include "system/hw_accel.h" #include "qemu/error-report.h" #include "accel-system.h" +CPUTailQ hw_accel_cpus_queue = QTAILQ_HEAD_INITIALIZER(hw_accel_cpus_queue); + +CPUTailQ *hw_accel_get_cpus_queue(void) +{ + return &hw_accel_cpus_queue; +} + int accel_init_machine(AccelState *accel, MachineState *ms) { AccelClass *acc = ACCEL_GET_CLASS(accel); diff --git a/accel/kvm/kvm-accel-ops.c b/accel/kvm/kvm-accel-ops.c index a81e8f3b03b..5f4001860d5 100644 --- a/accel/kvm/kvm-accel-ops.c +++ b/accel/kvm/kvm-accel-ops.c @@ -93,6 +93,7 @@ static void kvm_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->get_cpus_queue = hw_accel_get_cpus_queue; ops->create_vcpu_thread = kvm_start_vcpu_thread; ops->cpu_thread_is_idle = kvm_vcpu_thread_is_idle; ops->cpus_are_resettable = kvm_cpus_are_resettable; diff --git a/accel/xen/xen-all.c b/accel/xen/xen-all.c index 852e9fbe5fe..ac5ed2dfb80 100644 --- a/accel/xen/xen-all.c +++ b/accel/xen/xen-all.c @@ -150,6 +150,7 @@ static void xen_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->get_cpus_queue = hw_accel_get_cpus_queue; ops->create_vcpu_thread = dummy_start_vcpu_thread; } diff --git a/target/i386/nvmm/nvmm-accel-ops.c b/target/i386/nvmm/nvmm-accel-ops.c index e7b56662fee..bb407c68e14 100644 --- a/target/i386/nvmm/nvmm-accel-ops.c +++ b/target/i386/nvmm/nvmm-accel-ops.c @@ -84,6 +84,7 @@ static void nvmm_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->get_cpus_queue = hw_accel_get_cpus_queue; ops->create_vcpu_thread = nvmm_start_vcpu_thread; ops->kick_vcpu_thread = nvmm_kick_vcpu_thread; diff --git a/target/i386/whpx/whpx-accel-ops.c b/target/i386/whpx/whpx-accel-ops.c index ab2e014c9ea..191214ca81d 100644 --- a/target/i386/whpx/whpx-accel-ops.c +++ b/target/i386/whpx/whpx-accel-ops.c @@ -86,6 +86,7 @@ static void whpx_accel_ops_class_init(ObjectClass *oc, void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->get_cpus_queue = hw_accel_get_cpus_queue; ops->create_vcpu_thread = whpx_start_vcpu_thread; ops->kick_vcpu_thread = whpx_kick_vcpu_thread; ops->cpu_thread_is_idle = whpx_vcpu_thread_is_idle;