diff mbox series

[07/76] target/arm: Use vfp.fp_status_a64 in A64-only helper functions

Message ID 20250124162836.2332150-8-peter.maydell@linaro.org (mailing list archive)
State New
Headers show
Series target/arm: Implement FEAT_AFP and FEAT_RPRES | expand

Commit Message

Peter Maydell Jan. 24, 2025, 4:27 p.m. UTC
Switch from vfp.fp_status to vfp.fp_status_a64 for helpers which:
 * directly reference an fp_status field
 * are called only from the A64 decoder
 * are not called inside a set_rmode/restore_rmode sequence

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/tcg/sme_helper.c |  2 +-
 target/arm/tcg/vec_helper.c | 10 +++++-----
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Richard Henderson Jan. 25, 2025, 3:15 p.m. UTC | #1
On 1/24/25 08:27, Peter Maydell wrote:
> @@ -2808,7 +2808,7 @@ bool is_ebf(CPUARMState *env, float_status *statusp, float_status *oddstatusp)
>        */
>       bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF;
>   
> -    *statusp = env->vfp.fp_status;
> +    *statusp = env->vfp.fp_status_a64;
>       set_default_nan_mode(true, statusp);
>   
>       if (ebf) {

Is this really correct?  !ebf includes aa32.


r~
Peter Maydell Jan. 28, 2025, 12:35 p.m. UTC | #2
On Sat, 25 Jan 2025 at 15:16, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 1/24/25 08:27, Peter Maydell wrote:
> > @@ -2808,7 +2808,7 @@ bool is_ebf(CPUARMState *env, float_status *statusp, float_status *oddstatusp)
> >        */
> >       bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF;
> >
> > -    *statusp = env->vfp.fp_status;
> > +    *statusp = env->vfp.fp_status_a64;
> >       set_default_nan_mode(true, statusp);
> >
> >       if (ebf) {
>
> Is this really correct?  !ebf includes aa32.

Whoops, yes. I'll drop this hunk of the patch and put in this
patch afterwards:

Author: Peter Maydell <peter.maydell@linaro.org>
Date:   Tue Jan 28 11:40:13 2025 +0000

    target/arm: Use fp_status_a64 or fp_status_a32 in is_ebf()

    In is_ebf(), we might be called for A64 or A32, but we have
    the CPUARMState* so we can select fp_status_a64 or
    fp_status_a32 accordingly.

    Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index 011726a72d4..2ba1f7cb32e 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -2808,7 +2808,7 @@ bool is_ebf(CPUARMState *env, float_status
*statusp, float_status *oddstatusp)
      */
     bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF;

-    *statusp = env->vfp.fp_status;
+    *statusp = is_a64(env) ? env->vfp.fp_status_a64 : env->vfp.fp_status_a32;
     set_default_nan_mode(true, statusp);

     if (ebf) {

thanks
-- PMM
Richard Henderson Jan. 28, 2025, 3:54 p.m. UTC | #3
On 1/28/25 04:35, Peter Maydell wrote:
> On Sat, 25 Jan 2025 at 15:16, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> On 1/24/25 08:27, Peter Maydell wrote:
>>> @@ -2808,7 +2808,7 @@ bool is_ebf(CPUARMState *env, float_status *statusp, float_status *oddstatusp)
>>>         */
>>>        bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF;
>>>
>>> -    *statusp = env->vfp.fp_status;
>>> +    *statusp = env->vfp.fp_status_a64;
>>>        set_default_nan_mode(true, statusp);
>>>
>>>        if (ebf) {
>>
>> Is this really correct?  !ebf includes aa32.
> 
> Whoops, yes. I'll drop this hunk of the patch and put in this
> patch afterwards:
> 
> Author: Peter Maydell <peter.maydell@linaro.org>
> Date:   Tue Jan 28 11:40:13 2025 +0000
> 
>      target/arm: Use fp_status_a64 or fp_status_a32 in is_ebf()
> 
>      In is_ebf(), we might be called for A64 or A32, but we have
>      the CPUARMState* so we can select fp_status_a64 or
>      fp_status_a32 accordingly.
> 
>      Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> 
> diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
> index 011726a72d4..2ba1f7cb32e 100644
> --- a/target/arm/tcg/vec_helper.c
> +++ b/target/arm/tcg/vec_helper.c
> @@ -2808,7 +2808,7 @@ bool is_ebf(CPUARMState *env, float_status
> *statusp, float_status *oddstatusp)
>        */
>       bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF;
> 
> -    *statusp = env->vfp.fp_status;
> +    *statusp = is_a64(env) ? env->vfp.fp_status_a64 : env->vfp.fp_status_a32;
>       set_default_nan_mode(true, statusp);

That'll do.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index a0e6b4a41ea..2aad00d3ad9 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -1044,7 +1044,7 @@  void HELPER(sme_fmopa_h)(void *vza, void *vzn, void *vzm, void *vpn,
      * round-to-odd -- see above.
      */
     fpst_f16 = env->vfp.fp_status_f16;
-    fpst_std = env->vfp.fp_status;
+    fpst_std = env->vfp.fp_status_a64;
     set_default_nan_mode(true, &fpst_std);
     set_default_nan_mode(true, &fpst_f16);
     fpst_odd = fpst_std;
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index e3083c6e84e..44ee2c81fad 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -2066,7 +2066,7 @@  void HELPER(gvec_fmlal_a32)(void *vd, void *vn, void *vm,
 void HELPER(gvec_fmlal_a64)(void *vd, void *vn, void *vm,
                             CPUARMState *env, uint32_t desc)
 {
-    do_fmlal(vd, vn, vm, &env->vfp.fp_status, desc,
+    do_fmlal(vd, vn, vm, &env->vfp.fp_status_a64, desc,
              get_flush_inputs_to_zero(&env->vfp.fp_status_f16));
 }
 
@@ -2076,7 +2076,7 @@  void HELPER(sve2_fmlal_zzzw_s)(void *vd, void *vn, void *vm, void *va,
     intptr_t i, oprsz = simd_oprsz(desc);
     uint16_t negn = extract32(desc, SIMD_DATA_SHIFT, 1) << 15;
     intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16);
-    float_status *status = &env->vfp.fp_status;
+    float_status *status = &env->vfp.fp_status_a64;
     bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status_f16);
 
     for (i = 0; i < oprsz; i += sizeof(float32)) {
@@ -2128,7 +2128,7 @@  void HELPER(gvec_fmlal_idx_a32)(void *vd, void *vn, void *vm,
 void HELPER(gvec_fmlal_idx_a64)(void *vd, void *vn, void *vm,
                                 CPUARMState *env, uint32_t desc)
 {
-    do_fmlal_idx(vd, vn, vm, &env->vfp.fp_status, desc,
+    do_fmlal_idx(vd, vn, vm, &env->vfp.fp_status_a64, desc,
                  get_flush_inputs_to_zero(&env->vfp.fp_status_f16));
 }
 
@@ -2139,7 +2139,7 @@  void HELPER(sve2_fmlal_zzxw_s)(void *vd, void *vn, void *vm, void *va,
     uint16_t negn = extract32(desc, SIMD_DATA_SHIFT, 1) << 15;
     intptr_t sel = extract32(desc, SIMD_DATA_SHIFT + 1, 1) * sizeof(float16);
     intptr_t idx = extract32(desc, SIMD_DATA_SHIFT + 2, 3) * sizeof(float16);
-    float_status *status = &env->vfp.fp_status;
+    float_status *status = &env->vfp.fp_status_a64;
     bool fz16 = get_flush_inputs_to_zero(&env->vfp.fp_status_f16);
 
     for (i = 0; i < oprsz; i += 16) {
@@ -2808,7 +2808,7 @@  bool is_ebf(CPUARMState *env, float_status *statusp, float_status *oddstatusp)
      */
     bool ebf = is_a64(env) && env->vfp.fpcr & FPCR_EBF;
 
-    *statusp = env->vfp.fp_status;
+    *statusp = env->vfp.fp_status_a64;
     set_default_nan_mode(true, statusp);
 
     if (ebf) {