diff mbox series

[v3,03/17] hw/ssi: Make flash size a property in NPCM7XX FIU

Message ID 20250206013105.3228344-4-wuhaotsh@google.com (mailing list archive)
State New
Headers show
Series hw/arm: Add NPCM8XX Support | expand

Commit Message

Hao Wu Feb. 6, 2025, 1:30 a.m. UTC 
This allows different FIUs to have different flash sizes, useful
in NPCM8XX which has multiple different sized FIU modules.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
---
 hw/arm/npcm7xx.c             |  6 ++++++
 hw/ssi/npcm7xx_fiu.c         | 11 +++++++----
 include/hw/ssi/npcm7xx_fiu.h |  1 +
 3 files changed, 14 insertions(+), 4 deletions(-)

Comments

Philippe Mathieu-Daudé Feb. 6, 2025, 9:06 a.m. UTC | #1 
Hi Hao,

On 6/2/25 02:30, Hao Wu wrote:
> This allows different FIUs to have different flash sizes, useful
> in NPCM8XX which has multiple different sized FIU modules.
> 
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Hao Wu <wuhaotsh@google.com>
> ---
>   hw/arm/npcm7xx.c             |  6 ++++++
>   hw/ssi/npcm7xx_fiu.c         | 11 +++++++----
>   include/hw/ssi/npcm7xx_fiu.h |  1 +
>   3 files changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
> index 386b2c35e9..2d6e08b72b 100644
> --- a/hw/arm/npcm7xx.c
> +++ b/hw/arm/npcm7xx.c
> @@ -292,17 +292,21 @@ static const struct {
>       hwaddr regs_addr;
>       int cs_count;
>       const hwaddr *flash_addr;
> +    size_t flash_size;
>   } npcm7xx_fiu[] = {
>       {
>           .name = "fiu0",
>           .regs_addr = 0xfb000000,
>           .cs_count = ARRAY_SIZE(npcm7xx_fiu0_flash_addr),
>           .flash_addr = npcm7xx_fiu0_flash_addr,
> +        .flash_size = 128 * MiB,
> +
>       }, {
>           .name = "fiu3",
>           .regs_addr = 0xc0000000,
>           .cs_count = ARRAY_SIZE(npcm7xx_fiu3_flash_addr),
>           .flash_addr = npcm7xx_fiu3_flash_addr,
> +        .flash_size = 128 * MiB,
>       },
>   };
>   
> @@ -735,6 +739,8 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp)
>   
>           object_property_set_int(OBJECT(sbd), "cs-count",
>                                   npcm7xx_fiu[i].cs_count, &error_abort);
> +        object_property_set_int(OBJECT(sbd), "flash-size",
> +                                npcm7xx_fiu[i].flash_size, &error_abort);
>           sysbus_realize(sbd, &error_abort);
>   
>           sysbus_mmio_map(sbd, 0, npcm7xx_fiu[i].regs_addr);
> diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c
> index 21fc489038..ccdce67fa9 100644
> --- a/hw/ssi/npcm7xx_fiu.c
> +++ b/hw/ssi/npcm7xx_fiu.c
> @@ -28,9 +28,6 @@
>   
>   #include "trace.h"
>   
> -/* Up to 128 MiB of flash may be accessed directly as memory. */
> -#define NPCM7XX_FIU_FLASH_WINDOW_SIZE (128 * MiB)
> -
>   /* Each module has 4 KiB of register space. Only a fraction of it is used. */
>   #define NPCM7XX_FIU_CTRL_REGS_SIZE (4 * KiB)
>   
> @@ -507,6 +504,11 @@ static void npcm7xx_fiu_realize(DeviceState *dev, Error **errp)
>           return;
>       }
>   
> +    if (s->flash_size == 0) {
> +        error_setg(errp, "%s: flash size must be set", dev->canonical_path);
> +        return;
> +    }
> +
>       s->spi = ssi_create_bus(dev, "spi");
>       s->cs_lines = g_new0(qemu_irq, s->cs_count);
>       qdev_init_gpio_out_named(DEVICE(s), s->cs_lines, "cs", s->cs_count);
> @@ -525,7 +527,7 @@ static void npcm7xx_fiu_realize(DeviceState *dev, Error **errp)
>           flash->fiu = s;
>           memory_region_init_io(&flash->direct_access, OBJECT(s),
>                                 &npcm7xx_fiu_flash_ops, &s->flash[i], "flash",
> -                              NPCM7XX_FIU_FLASH_WINDOW_SIZE);
> +                              s->flash_size);

Per the comment, this is the device aperture.

Either add a check whether size is always <= 128 * MiB, or use
MIN(s->flash_size, NPCM7XX_FIU_FLASH_WINDOW_SIZE)?

>           sysbus_init_mmio(sbd, &flash->direct_access);
>       }
>   }
> @@ -543,6 +545,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = {
>   
>   static const Property npcm7xx_fiu_properties[] = {
>       DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
> +    DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0),
>   };
>   
>   static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data)
> diff --git a/include/hw/ssi/npcm7xx_fiu.h b/include/hw/ssi/npcm7xx_fiu.h
> index a3a1704289..1785ea16f4 100644
> --- a/include/hw/ssi/npcm7xx_fiu.h
> +++ b/include/hw/ssi/npcm7xx_fiu.h
> @@ -60,6 +60,7 @@ struct NPCM7xxFIUState {
>       int32_t cs_count;
>       int32_t active_cs;
>       qemu_irq *cs_lines;
> +    size_t flash_size;
>       NPCM7xxFIUFlash *flash;
>   
>       SSIBus *spi;
diff mbox series

Patch

diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 386b2c35e9..2d6e08b72b 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -292,17 +292,21 @@  static const struct {
     hwaddr regs_addr;
     int cs_count;
     const hwaddr *flash_addr;
+    size_t flash_size;
 } npcm7xx_fiu[] = {
     {
         .name = "fiu0",
         .regs_addr = 0xfb000000,
         .cs_count = ARRAY_SIZE(npcm7xx_fiu0_flash_addr),
         .flash_addr = npcm7xx_fiu0_flash_addr,
+        .flash_size = 128 * MiB,
+
     }, {
         .name = "fiu3",
         .regs_addr = 0xc0000000,
         .cs_count = ARRAY_SIZE(npcm7xx_fiu3_flash_addr),
         .flash_addr = npcm7xx_fiu3_flash_addr,
+        .flash_size = 128 * MiB,
     },
 };
 
@@ -735,6 +739,8 @@  static void npcm7xx_realize(DeviceState *dev, Error **errp)
 
         object_property_set_int(OBJECT(sbd), "cs-count",
                                 npcm7xx_fiu[i].cs_count, &error_abort);
+        object_property_set_int(OBJECT(sbd), "flash-size",
+                                npcm7xx_fiu[i].flash_size, &error_abort);
         sysbus_realize(sbd, &error_abort);
 
         sysbus_mmio_map(sbd, 0, npcm7xx_fiu[i].regs_addr);
diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c
index 21fc489038..ccdce67fa9 100644
--- a/hw/ssi/npcm7xx_fiu.c
+++ b/hw/ssi/npcm7xx_fiu.c
@@ -28,9 +28,6 @@ 
 
 #include "trace.h"
 
-/* Up to 128 MiB of flash may be accessed directly as memory. */
-#define NPCM7XX_FIU_FLASH_WINDOW_SIZE (128 * MiB)
-
 /* Each module has 4 KiB of register space. Only a fraction of it is used. */
 #define NPCM7XX_FIU_CTRL_REGS_SIZE (4 * KiB)
 
@@ -507,6 +504,11 @@  static void npcm7xx_fiu_realize(DeviceState *dev, Error **errp)
         return;
     }
 
+    if (s->flash_size == 0) {
+        error_setg(errp, "%s: flash size must be set", dev->canonical_path);
+        return;
+    }
+
     s->spi = ssi_create_bus(dev, "spi");
     s->cs_lines = g_new0(qemu_irq, s->cs_count);
     qdev_init_gpio_out_named(DEVICE(s), s->cs_lines, "cs", s->cs_count);
@@ -525,7 +527,7 @@  static void npcm7xx_fiu_realize(DeviceState *dev, Error **errp)
         flash->fiu = s;
         memory_region_init_io(&flash->direct_access, OBJECT(s),
                               &npcm7xx_fiu_flash_ops, &s->flash[i], "flash",
-                              NPCM7XX_FIU_FLASH_WINDOW_SIZE);
+                              s->flash_size);
         sysbus_init_mmio(sbd, &flash->direct_access);
     }
 }
@@ -543,6 +545,7 @@  static const VMStateDescription vmstate_npcm7xx_fiu = {
 
 static const Property npcm7xx_fiu_properties[] = {
     DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
+    DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0),
 };
 
 static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data)
diff --git a/include/hw/ssi/npcm7xx_fiu.h b/include/hw/ssi/npcm7xx_fiu.h
index a3a1704289..1785ea16f4 100644
--- a/include/hw/ssi/npcm7xx_fiu.h
+++ b/include/hw/ssi/npcm7xx_fiu.h
@@ -60,6 +60,7 @@  struct NPCM7xxFIUState {
     int32_t cs_count;
     int32_t active_cs;
     qemu_irq *cs_lines;
+    size_t flash_size;
     NPCM7xxFIUFlash *flash;
 
     SSIBus *spi;