| Message ID | 20250212034617.1079324-6-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | tcg: Introduce constraint for zero register | expand |
On 12/2/25 04:46, Richard Henderson wrote: > Replace target-specific 'Z' with generic 'z'. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > tcg/riscv/tcg-target-con-set.h | 10 +++++----- > tcg/riscv/tcg-target-con-str.h | 1 - > tcg/riscv/tcg-target.c.inc | 12 ++++++------ > 3 files changed, 11 insertions(+), 12 deletions(-) > diff --git a/tcg/riscv/tcg-target-con-str.h b/tcg/riscv/tcg-target-con-str.h > index 089efe96ca..2f9700638c 100644 > --- a/tcg/riscv/tcg-target-con-str.h > +++ b/tcg/riscv/tcg-target-con-str.h > @@ -21,4 +21,3 @@ CONST('K', TCG_CT_CONST_S5) > CONST('L', TCG_CT_CONST_CMP_VI) > CONST('N', TCG_CT_CONST_N12) > CONST('M', TCG_CT_CONST_M12) > -CONST('Z', TCG_CT_CONST_ZERO) Squashing: -- >8 -- diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 61dc310c1aa..6edeb743384 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -391,9 +391,6 @@ static bool tcg_target_const_match(int64_t val, int ct, if (ct & TCG_CT_CONST) { return 1; } - if ((ct & TCG_CT_CONST_ZERO) && val == 0) { - return 1; - } if (type >= TCG_TYPE_V64) { /* Val is replicated by VECE; extract the highest element. */ val >>= (-8 << vece) & 63; --- Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On 13/2/25 16:50, Philippe Mathieu-Daudé wrote: > On 12/2/25 04:46, Richard Henderson wrote: >> Replace target-specific 'Z' with generic 'z'. >> >> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> tcg/riscv/tcg-target-con-set.h | 10 +++++----- >> tcg/riscv/tcg-target-con-str.h | 1 - >> tcg/riscv/tcg-target.c.inc | 12 ++++++------ >> 3 files changed, 11 insertions(+), 12 deletions(-) > > >> diff --git a/tcg/riscv/tcg-target-con-str.h b/tcg/riscv/tcg-target- >> con-str.h >> index 089efe96ca..2f9700638c 100644 >> --- a/tcg/riscv/tcg-target-con-str.h >> +++ b/tcg/riscv/tcg-target-con-str.h >> @@ -21,4 +21,3 @@ CONST('K', TCG_CT_CONST_S5) >> CONST('L', TCG_CT_CONST_CMP_VI) >> CONST('N', TCG_CT_CONST_N12) >> CONST('M', TCG_CT_CONST_M12) >> -CONST('Z', TCG_CT_CONST_ZERO) > > Squashing: > > -- >8 -- > diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc > index 61dc310c1aa..6edeb743384 100644 > --- a/tcg/riscv/tcg-target.c.inc > +++ b/tcg/riscv/tcg-target.c.inc and: @@ -112,13 +112,12 @@ static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) return TCG_REG_A0 + slot; } -#define TCG_CT_CONST_ZERO 0x100 -#define TCG_CT_CONST_S12 0x200 -#define TCG_CT_CONST_N12 0x400 -#define TCG_CT_CONST_M12 0x800 -#define TCG_CT_CONST_J12 0x1000 -#define TCG_CT_CONST_S5 0x2000 -#define TCG_CT_CONST_CMP_VI 0x4000 +#define TCG_CT_CONST_S12 0x100 +#define TCG_CT_CONST_N12 0x200 +#define TCG_CT_CONST_M12 0x400 +#define TCG_CT_CONST_J12 0x800 +#define TCG_CT_CONST_S5 0x1000 +#define TCG_CT_CONST_CMP_VI 0x2000 #define ALL_GENERAL_REGS MAKE_64BIT_MASK(0, 32) #define ALL_VECTOR_REGS MAKE_64BIT_MASK(32, 32) > @@ -391,9 +391,6 @@ static bool tcg_target_const_match(int64_t val, int ct, > if (ct & TCG_CT_CONST) { > return 1; > } > - if ((ct & TCG_CT_CONST_ZERO) && val == 0) { > - return 1; > - } > if (type >= TCG_TYPE_V64) { > /* Val is replicated by VECE; extract the highest element. */ > val >>= (-8 << vece) & 63; > --- > > Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> >
diff --git a/tcg/riscv/tcg-target-con-set.h b/tcg/riscv/tcg-target-con-set.h index 3c4ef44eb0..e92e815491 100644 --- a/tcg/riscv/tcg-target-con-set.h +++ b/tcg/riscv/tcg-target-con-set.h @@ -10,17 +10,17 @@ * tcg-target-con-str.h; the constraint combination is inclusive or. */ C_O0_I1(r) -C_O0_I2(rZ, r) -C_O0_I2(rZ, rZ) +C_O0_I2(rz, r) +C_O0_I2(rz, rz) C_O1_I1(r, r) C_O1_I2(r, r, ri) C_O1_I2(r, r, rI) C_O1_I2(r, r, rJ) -C_O1_I2(r, rZ, rN) -C_O1_I2(r, rZ, rZ) +C_O1_I2(r, rz, rN) +C_O1_I2(r, rz, rz) C_N1_I2(r, r, rM) C_O1_I4(r, r, rI, rM, rM) -C_O2_I4(r, r, rZ, rZ, rM, rM) +C_O2_I4(r, r, rz, rz, rM, rM) C_O0_I2(v, r) C_O1_I1(v, r) C_O1_I1(v, v) diff --git a/tcg/riscv/tcg-target-con-str.h b/tcg/riscv/tcg-target-con-str.h index 089efe96ca..2f9700638c 100644 --- a/tcg/riscv/tcg-target-con-str.h +++ b/tcg/riscv/tcg-target-con-str.h @@ -21,4 +21,3 @@ CONST('K', TCG_CT_CONST_S5) CONST('L', TCG_CT_CONST_CMP_VI) CONST('N', TCG_CT_CONST_N12) CONST('M', TCG_CT_CONST_M12) -CONST('Z', TCG_CT_CONST_ZERO) diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index dae892437e..361114a780 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -2680,7 +2680,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) case INDEX_op_st16_i64: case INDEX_op_st32_i64: case INDEX_op_st_i64: - return C_O0_I2(rZ, r); + return C_O0_I2(rz, r); case INDEX_op_add_i32: case INDEX_op_and_i32: @@ -2706,7 +2706,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) case INDEX_op_sub_i32: case INDEX_op_sub_i64: - return C_O1_I2(r, rZ, rN); + return C_O1_I2(r, rz, rN); case INDEX_op_mul_i32: case INDEX_op_mulsh_i32: @@ -2722,7 +2722,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) case INDEX_op_divu_i64: case INDEX_op_rem_i64: case INDEX_op_remu_i64: - return C_O1_I2(r, rZ, rZ); + return C_O1_I2(r, rz, rz); case INDEX_op_shl_i32: case INDEX_op_shr_i32: @@ -2744,7 +2744,7 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: - return C_O0_I2(rZ, rZ); + return C_O0_I2(rz, rz); case INDEX_op_movcond_i32: case INDEX_op_movcond_i64: @@ -2754,14 +2754,14 @@ tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags) case INDEX_op_add2_i64: case INDEX_op_sub2_i32: case INDEX_op_sub2_i64: - return C_O2_I4(r, r, rZ, rZ, rM, rM); + return C_O2_I4(r, r, rz, rz, rM, rM); case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_ld_i64: return C_O1_I1(r, r); case INDEX_op_qemu_st_i32: case INDEX_op_qemu_st_i64: - return C_O0_I2(rZ, r); + return C_O0_I2(rz, r); case INDEX_op_st_vec: return C_O0_I2(v, r);
Replace target-specific 'Z' with generic 'z'. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/riscv/tcg-target-con-set.h | 10 +++++----- tcg/riscv/tcg-target-con-str.h | 1 - tcg/riscv/tcg-target.c.inc | 12 ++++++------ 3 files changed, 11 insertions(+), 12 deletions(-)