| Message ID | 20250219184609.1839281-4-wuhaotsh@google.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm: Add NPCM8XX Support | expand |
On Wed, 19 Feb 2025 at 18:46, Hao Wu <wuhaotsh@google.com> wrote: > > This allows different FIUs to have different flash sizes, useful > in NPCM8XX which has multiple different sized FIU modules. > > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Hao Wu <wuhaotsh@google.com> > Reviewed-by: Philippe Mathieu-Daude <philmd@linaro.org> > @@ -543,6 +554,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = { > > static const Property npcm7xx_fiu_properties[] = { > DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0), > + DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0), > }; > > static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data) > diff --git a/include/hw/ssi/npcm7xx_fiu.h b/include/hw/ssi/npcm7xx_fiu.h > index a3a1704289..1785ea16f4 100644 > --- a/include/hw/ssi/npcm7xx_fiu.h > +++ b/include/hw/ssi/npcm7xx_fiu.h > @@ -60,6 +60,7 @@ struct NPCM7xxFIUState { > int32_t cs_count; > int32_t active_cs; > qemu_irq *cs_lines; > + size_t flash_size; > NPCM7xxFIUFlash *flash; > > SSIBus *spi; The field for a DEFINE_PROP_SIZE must be a uint64_t, or it won't build on 32-bit hosts: In file included from ../include/qemu/osdep.h:53, from ../hw/ssi/npcm7xx_fiu.c:17: ../include/qemu/compiler.h:65:35: error: invalid operands to binary - (have ‘uint64_t *’ {aka ‘long long unsigned int *’} and ‘size_t *’ {aka ‘unsigned int *’}) 65 | #define type_check(t1,t2) ((t1*)0 - (t2*)0) | ^ ../include/hw/qdev-properties.h:71:15: note: in expansion of macro ‘type_check’ 71 | + type_check(_type, typeof_field(_state, _field)), \ | ^~~~~~~~~~ ../include/hw/qdev-properties.h:90:5: note: in expansion of macro ‘DEFINE_PROP’ 90 | DEFINE_PROP(_name, _state, _field, _prop, _type, \ | ^~~~~~~~~~~ ../include/hw/qdev-properties.h:166:5: note: in expansion of macro ‘DEFINE_PROP_UNSIGNED’ 166 | DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_size, uint64_t) | ^~~~~~~~~~~~~~~~~~~~ ../hw/ssi/npcm7xx_fiu.c:557:5: note: in expansion of macro ‘DEFINE_PROP_SIZE’ 557 | DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0), | ^~~~~~~~~~~~~~~~ -- PMM
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index 386b2c35e9..2d6e08b72b 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -292,17 +292,21 @@ static const struct { hwaddr regs_addr; int cs_count; const hwaddr *flash_addr; + size_t flash_size; } npcm7xx_fiu[] = { { .name = "fiu0", .regs_addr = 0xfb000000, .cs_count = ARRAY_SIZE(npcm7xx_fiu0_flash_addr), .flash_addr = npcm7xx_fiu0_flash_addr, + .flash_size = 128 * MiB, + }, { .name = "fiu3", .regs_addr = 0xc0000000, .cs_count = ARRAY_SIZE(npcm7xx_fiu3_flash_addr), .flash_addr = npcm7xx_fiu3_flash_addr, + .flash_size = 128 * MiB, }, }; @@ -735,6 +739,8 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(sbd), "cs-count", npcm7xx_fiu[i].cs_count, &error_abort); + object_property_set_int(OBJECT(sbd), "flash-size", + npcm7xx_fiu[i].flash_size, &error_abort); sysbus_realize(sbd, &error_abort); sysbus_mmio_map(sbd, 0, npcm7xx_fiu[i].regs_addr); diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c index 21fc489038..8df4bec3f1 100644 --- a/hw/ssi/npcm7xx_fiu.c +++ b/hw/ssi/npcm7xx_fiu.c @@ -29,7 +29,7 @@ #include "trace.h" /* Up to 128 MiB of flash may be accessed directly as memory. */ -#define NPCM7XX_FIU_FLASH_WINDOW_SIZE (128 * MiB) +#define NPCM7XX_FIU_MAX_FLASH_WINDOW_SIZE (128 * MiB) /* Each module has 4 KiB of register space. Only a fraction of it is used. */ #define NPCM7XX_FIU_CTRL_REGS_SIZE (4 * KiB) @@ -507,6 +507,17 @@ static void npcm7xx_fiu_realize(DeviceState *dev, Error **errp) return; } + if (s->flash_size == 0) { + error_setg(errp, "%s: flash size must be set", dev->canonical_path); + return; + } + + if (s->flash_size > NPCM7XX_FIU_MAX_FLASH_WINDOW_SIZE) { + error_setg(errp, "%s: flash size should not exceed 128 MiB", + dev->canonical_path); + return; + } + s->spi = ssi_create_bus(dev, "spi"); s->cs_lines = g_new0(qemu_irq, s->cs_count); qdev_init_gpio_out_named(DEVICE(s), s->cs_lines, "cs", s->cs_count); @@ -525,7 +536,7 @@ static void npcm7xx_fiu_realize(DeviceState *dev, Error **errp) flash->fiu = s; memory_region_init_io(&flash->direct_access, OBJECT(s), &npcm7xx_fiu_flash_ops, &s->flash[i], "flash", - NPCM7XX_FIU_FLASH_WINDOW_SIZE); + s->flash_size); sysbus_init_mmio(sbd, &flash->direct_access); } } @@ -543,6 +554,7 @@ static const VMStateDescription vmstate_npcm7xx_fiu = { static const Property npcm7xx_fiu_properties[] = { DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0), + DEFINE_PROP_SIZE("flash-size", NPCM7xxFIUState, flash_size, 0), }; static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data) diff --git a/include/hw/ssi/npcm7xx_fiu.h b/include/hw/ssi/npcm7xx_fiu.h index a3a1704289..1785ea16f4 100644 --- a/include/hw/ssi/npcm7xx_fiu.h +++ b/include/hw/ssi/npcm7xx_fiu.h @@ -60,6 +60,7 @@ struct NPCM7xxFIUState { int32_t cs_count; int32_t active_cs; qemu_irq *cs_lines; + size_t flash_size; NPCM7xxFIUFlash *flash; SSIBus *spi;