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Mon, 24 Feb 2025 00:25:01 -0800 (PST) Received: from hsinchu26.internal.sifive.com ([210.176.154.34]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7325c88d74esm17714914b3a.149.2025.02.24.00.24.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2025 00:25:01 -0800 (PST) From: Yong-Xuan Wang To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: greentime.hu@sifive.com, vincent.chen@sifive.com, frank.chang@sifive.com, jim.shu@sifive.com, Yong-Xuan Wang , Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei Subject: [PATCH v2 8/8] hw/intc/imsic: prevent to use IMSIC when host doesn't support AIA extension Date: Mon, 24 Feb 2025 16:24:15 +0800 Message-Id: <20250224082417.31382-9-yongxuan.wang@sifive.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250224082417.31382-1-yongxuan.wang@sifive.com> References: <20250224082417.31382-1-yongxuan.wang@sifive.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::632; envelope-from=yongxuan.wang@sifive.com; helo=mail-pl1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Currently QEMU will continue to create the IMSIC devices and enable the AIA extension for guest OS when the host kernel doesn't support the AIA extension. This will cause an illegal instruction exception when the guest OS access the AIA CSRs. Add additional checks to ensure the guest OS only uses the IMSIC devices when the host kernel supports the AIA extension. Signed-off-by: Yong-Xuan Wang --- hw/intc/riscv_imsic.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index dc8162c0a7c9..8c64f2c21274 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -375,12 +375,21 @@ static void riscv_imsic_realize(DeviceState *dev, Error **errp) /* Force select AIA feature and setup CSR read-modify-write callback */ if (env) { - if (!imsic->mmode) { - rcpu->cfg.ext_ssaia = true; - riscv_cpu_set_geilen(env, imsic->num_pages - 1); + if (kvm_enabled()) { + if (!rcpu->cfg.ext_ssaia) { + error_report("Host machine doesn't support AIA extension. " + "Do not use IMSIC as interrupt controller."); + exit(1); + } } else { - rcpu->cfg.ext_smaia = true; + if (!imsic->mmode) { + rcpu->cfg.ext_ssaia = true; + riscv_cpu_set_geilen(env, imsic->num_pages - 1); + } else { + rcpu->cfg.ext_smaia = true; + } } + riscv_cpu_set_aia_ireg_rmw_fn(env, (imsic->mmode) ? PRV_M : PRV_S, riscv_imsic_rmw, imsic); }