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Mon, 24 Feb 2025 19:40:24 -0500 (EST) From: Jiaxun Yang Date: Tue, 25 Feb 2025 00:40:20 +0000 Subject: [PATCH v2 7/9] target/loongarch: Use target_ulong for CSR helpers MIME-Version: 1.0 Message-Id: <20250225-la32-fixes1-v2-7-8ec68ada3dd5@flygoat.com> References: <20250225-la32-fixes1-v2-0-8ec68ada3dd5@flygoat.com> In-Reply-To: <20250225-la32-fixes1-v2-0-8ec68ada3dd5@flygoat.com> To: qemu-devel@nongnu.org Cc: Song Gao , Jiaxun Yang X-Mailer: b4 0.14.2 Received-SPF: pass client-ip=202.12.124.149; envelope-from=jiaxun.yang@flygoat.com; helo=fout-b6-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org All CSRs are meant to be target_ulong wide in our setting. Signed-off-by: Jiaxun Yang --- target/loongarch/helper.h | 14 +++++++------- target/loongarch/tcg/op_helper.c | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h index 409d93a5b0808f0e32b8c0e2e17cebac9feaf8ed..a608754b7f52689da9e9f4da1cef68d5af72f2ed 100644 --- a/target/loongarch/helper.h +++ b/target/loongarch/helper.h @@ -97,13 +97,13 @@ DEF_HELPER_1(rdtime_d, i64, env) #ifndef CONFIG_USER_ONLY /* CSRs helper */ -DEF_HELPER_1(csrrd_pgd, i64, env) -DEF_HELPER_1(csrrd_cpuid, i64, env) -DEF_HELPER_1(csrrd_tval, i64, env) -DEF_HELPER_2(csrwr_estat, i64, env, tl) -DEF_HELPER_2(csrwr_asid, i64, env, tl) -DEF_HELPER_2(csrwr_tcfg, i64, env, tl) -DEF_HELPER_2(csrwr_ticlr, i64, env, tl) +DEF_HELPER_1(csrrd_pgd, tl, env) +DEF_HELPER_1(csrrd_cpuid, tl, env) +DEF_HELPER_1(csrrd_tval, tl, env) +DEF_HELPER_2(csrwr_estat, tl, env, tl) +DEF_HELPER_2(csrwr_asid, tl, env, tl) +DEF_HELPER_2(csrwr_tcfg, tl, env, tl) +DEF_HELPER_2(csrwr_ticlr, tl, env, tl) DEF_HELPER_2(iocsrrd_b, tl, env, tl) DEF_HELPER_2(iocsrrd_h, tl, env, tl) DEF_HELPER_2(iocsrrd_w, tl, env, tl) diff --git a/target/loongarch/tcg/op_helper.c b/target/loongarch/tcg/op_helper.c index b17208e5b962f2191b2afa60181bff311d618bba..c9d7e84e7ec9000bab655366bdf6ed8aaa4fd080 100644 --- a/target/loongarch/tcg/op_helper.c +++ b/target/loongarch/tcg/op_helper.c @@ -61,7 +61,7 @@ void helper_asrtgt_d(CPULoongArchState *env, target_ulong rj, target_ulong rk) } } -target_ulong helper_crc32(target_ulong val, target_ulong m, uint64_t sz) +target_ulong helper_crc32(target_ulong val, target_ulong m, target_ulong sz) { uint8_t buf[8]; target_ulong mask = ((sz * 8) == 64) ? -1ULL : ((1ULL << (sz * 8)) - 1); @@ -71,7 +71,7 @@ target_ulong helper_crc32(target_ulong val, target_ulong m, uint64_t sz) return (int32_t) (crc32(val ^ 0xffffffff, buf, sz) ^ 0xffffffff); } -target_ulong helper_crc32c(target_ulong val, target_ulong m, uint64_t sz) +target_ulong helper_crc32c(target_ulong val, target_ulong m, target_ulong sz) { uint8_t buf[8]; target_ulong mask = ((sz * 8) == 64) ? -1ULL : ((1ULL << (sz * 8)) - 1);