Message ID | 20250227062523.124601-5-zhao1.liu@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | i386/cpu: Fix topological field encoding & overflow | expand |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d75175b0850a..7ca9740e8c97 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -493,7 +493,8 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, *eax = CACHE_TYPE(cache->type) | CACHE_LEVEL(cache->level) | (cache->self_init ? CACHE_SELF_INIT_LEVEL : 0); - *eax |= max_thread_ids_for_cache(topo_info, cache->share_level) << 14; + /* Bits 25:14 - NumSharingCache: maximum 4095. */ + *eax |= MIN(max_thread_ids_for_cache(topo_info, cache->share_level), 4095) << 14; assert(cache->line_size > 0); assert(cache->partitions > 0);
CPUID.8000001DH:EAX[25:14] is "NumSharingCache", and the number of logical processors sharing this cache is the value of this field incremented by 1. Because of its width limitation, the maximum value currently supported is 4095. Though at present Q35 supports up to 4096 CPUs, to prevent potential overflow issues from further increasing the number of CPUs in the future, check and honor the maximum value as CPUID.04H did. Cc: Babu Moger <babu.moger@amd.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> --- RFC: * Although there are currently no overflow cases, to avoid any potential issue, add the overflow check, just as I did for Intel. --- target/i386/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)