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From: Hendrik Wuethrich To: qemu-devel@nongnu.org, eduardo@habkost.net, richard.henderson@linaro.org, marcel.apfelbaum@gmail.com, mst@redhat.com, pbonzini@redhat.com, zhao1.liu@intel.com, xiaoyao.li@intel.com, Jonathan.Cameron@huawei.com, v6-0000-cover-letter.patch@google.com Cc: peternewman@google.com, Hendrik Wuethrich Received-SPF: pass client-ip=2a00:1450:4864:20::349; envelope-from=36xbCZwgKCmYaLIRHVMOKSSKPI.GSQUIQY-HIZIPRSRKRY.SVK@flex--whendrik.bounces.google.com; helo=mail-wm1-x349.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Change config to show RDT, add minimal code to the rdt.c module to make sure things still compile. Signed-off-by: Hendrik Wuethrich --- hw/i386/Kconfig | 4 ++ hw/i386/meson.build | 1 + hw/i386/rdt.c | 97 +++++++++++++++++++++++++++++++++++++++++++ include/hw/i386/rdt.h | 35 ++++++++++++++++ target/i386/cpu.h | 4 ++ 5 files changed, 141 insertions(+) create mode 100644 hw/i386/rdt.c create mode 100644 include/hw/i386/rdt.h diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index d34ce07b21..a3a6b2259c 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -10,6 +10,9 @@ config SGX bool depends on KVM +config RDT + bool + config PC bool imply APPLESMC @@ -26,6 +29,7 @@ config PC imply QXL imply SEV imply SGX + imply RDT imply TEST_DEVICES imply TPM_CRB imply TPM_TIS_ISA diff --git a/hw/i386/meson.build b/hw/i386/meson.build index 10bdfde27c..3a697dcc03 100644 --- a/hw/i386/meson.build +++ b/hw/i386/meson.build @@ -22,6 +22,7 @@ i386_ss.add(when: 'CONFIG_VMPORT', if_true: files('vmport.c')) i386_ss.add(when: 'CONFIG_VTD', if_true: files('intel_iommu.c')) i386_ss.add(when: 'CONFIG_SGX', if_true: files('sgx-epc.c','sgx.c'), if_false: files('sgx-stub.c')) +i386_ss.add(when: 'CONFIG_RDT', if_true: files('rdt.c')) i386_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-common.c')) i386_ss.add(when: 'CONFIG_PC', if_true: files( diff --git a/hw/i386/rdt.c b/hw/i386/rdt.c new file mode 100644 index 0000000000..76a253902b --- /dev/null +++ b/hw/i386/rdt.c @@ -0,0 +1,97 @@ +/* + * Intel Resource Director Technology (RDT). + * + * Copyright 2025 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "hw/i386/rdt.h" +#include "qemu/osdep.h" /* Needs to be included before isa.h */ +#include "hw/isa/isa.h" +#include "hw/qdev-properties.h" +#include "qom/object.h" + +#define TYPE_RDT "rdt" +#define RDT_NUM_RMID_PROP "rmids" + +OBJECT_DECLARE_TYPE(RDTState, RDTStateClass, RDT); + +struct RDTMonitor { + uint64_t count_local; + uint64_t count_remote; + uint64_t count_l3; +}; + +struct RDTAllocation { + QemuMutex lock; + uint32_t active_cos; +}; + +struct RDTStatePerCore { + QemuMutex lock; + uint32_t active_rmid; +}; + +struct RDTStatePerL3Cache { + QemuMutex lock; + + RDTMonitor *monitors; + + /* RDT Allocation bitmask MSRs */ + uint32_t msr_L3_ia32_mask_n[RDT_MAX_L3_MASK_COUNT]; + uint32_t msr_L2_ia32_mask_n[RDT_MAX_L2_MASK_COUNT]; + uint32_t ia32_L2_qos_ext_bw_thrtl_n[RDT_MAX_MBA_THRTL_COUNT]; + + /* Parent RDTState */ + RDTState *rdtstate; +}; + +/* One instance of RDT-internal state to be shared by all cores */ +struct RDTState { + ISADevice parent; + + /* Max amount of RMIDs */ + uint32_t rmids; + + uint16_t l3_caches; + + RDTStatePerL3Cache *rdtInstances; + RDTAllocation *allocations; +}; + +struct RDTStateClass { +}; + +OBJECT_DEFINE_TYPE(RDTState, rdt, RDT, ISA_DEVICE); + +static Property rdt_properties[] = { + DEFINE_PROP_UINT32(RDT_NUM_RMID_PROP, RDTState, rmids, 256), +}; + +static void rdt_init(Object *obj) +{ +} + +static void rdt_finalize(Object *obj) +{ +} + +static void rdt_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->hotpluggable = false; + dc->desc = "RDT"; + dc->user_creatable = true; + + device_class_set_props(dc, rdt_properties); +} diff --git a/include/hw/i386/rdt.h b/include/hw/i386/rdt.h new file mode 100644 index 0000000000..1f99f98f7f --- /dev/null +++ b/include/hw/i386/rdt.h @@ -0,0 +1,35 @@ +/* + * Intel Resource Director Technology (RDT). + * + * Copyright 2025 Google LLC + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#ifndef HW_RDT_H +#define HW_RDT_H + +/* Max counts for allocation masks or CBMs. In other words, the size of + * respective MSRs. + * L3_MASK and L3_mask are architectural limitations. THRTL_COUNT is just + * the space left until the next MSR. + * */ +#define RDT_MAX_L3_MASK_COUNT 127 +#define RDT_MAX_L2_MASK_COUNT 63 +#define RDT_MAX_MBA_THRTL_COUNT 63 + +typedef struct RDTState RDTState; +typedef struct RDTStatePerL3Cache RDTStatePerL3Cache; +typedef struct RDTStatePerCore RDTStatePerCore; +typedef struct RDTMonitor RDTMonitor; +typedef struct RDTAllocation RDTAllocation; + +#endif diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c67b42d34f..2cbcc8fe4e 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2253,6 +2253,10 @@ struct ArchCPU { struct MemoryRegion *cpu_as_root, *cpu_as_mem, *smram; Notifier machine_done; + /* Help the RDT MSRs find the RDT device state */ + struct RDTStatePerL3Cache *rdtStatePerL3Cache; + struct RDTStatePerCore *rdtPerCore; + struct kvm_msrs *kvm_msr_buf; int32_t node_id; /* NUMA node this CPU belongs to */