| Message ID | 20250303073547.1145080-5-jamin_lin@aspeedtech.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Fix hw-strap for AST2700 | expand |
On 3/3/25 08:35, Jamin Lin wrote: > There is one hw_strap1 register in the SCU (CPU DIE) and another hw_strap1 > register in the SCUIO (IO DIE). > > In the "ast2700_a0_resets" function, the hardcoded value "0x00000800" is set in > SCU hw-strap1 (CPU DIE), and in "ast2700_a0_resets_io" the hardcoded value > "0x00000504" is set in SCUIO hw-strap1 (IO DIE). Both values cannot be set via > the SOC layer. > > The value of "s->hw_strap1" is set by the SOC layer via the "hw-strap1" property. > Update the "aspeed_ast2700_scu_reset" function to set the value of "s->hw_strap1" > in both the SCU and SCUIO hw-strap1 registers. > > Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Thanks, C. > --- > hw/misc/aspeed_scu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c > index 545d004749..0581c744f1 100644 > --- a/hw/misc/aspeed_scu.c > +++ b/hw/misc/aspeed_scu.c > @@ -910,7 +910,6 @@ static const MemoryRegionOps aspeed_ast2700_scu_ops = { > }; > > static const uint32_t ast2700_a0_resets[ASPEED_AST2700_SCU_NR_REGS] = { > - [AST2700_HW_STRAP1] = 0x00000800, > [AST2700_HW_STRAP1_CLR] = 0xFFF0FFF0, > [AST2700_HW_STRAP1_LOCK] = 0x00000FFF, > [AST2700_HW_STRAP1_SEC1] = 0x000000FF, > @@ -940,6 +939,7 @@ static void aspeed_ast2700_scu_reset(DeviceState *dev) > > memcpy(s->regs, asc->resets, asc->nr_regs * 4); > s->regs[AST2700_SILICON_REV] = s->silicon_rev; > + s->regs[AST2700_HW_STRAP1] = s->hw_strap1; > } > > static void aspeed_2700_scu_class_init(ObjectClass *klass, void *data) > @@ -1032,7 +1032,6 @@ static const MemoryRegionOps aspeed_ast2700_scuio_ops = { > }; > > static const uint32_t ast2700_a0_resets_io[ASPEED_AST2700_SCU_NR_REGS] = { > - [AST2700_HW_STRAP1] = 0x00000504, > [AST2700_HW_STRAP1_CLR] = 0xFFF0FFF0, > [AST2700_HW_STRAP1_LOCK] = 0x00000FFF, > [AST2700_HW_STRAP1_SEC1] = 0x000000FF,
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 545d004749..0581c744f1 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -910,7 +910,6 @@ static const MemoryRegionOps aspeed_ast2700_scu_ops = { }; static const uint32_t ast2700_a0_resets[ASPEED_AST2700_SCU_NR_REGS] = { - [AST2700_HW_STRAP1] = 0x00000800, [AST2700_HW_STRAP1_CLR] = 0xFFF0FFF0, [AST2700_HW_STRAP1_LOCK] = 0x00000FFF, [AST2700_HW_STRAP1_SEC1] = 0x000000FF, @@ -940,6 +939,7 @@ static void aspeed_ast2700_scu_reset(DeviceState *dev) memcpy(s->regs, asc->resets, asc->nr_regs * 4); s->regs[AST2700_SILICON_REV] = s->silicon_rev; + s->regs[AST2700_HW_STRAP1] = s->hw_strap1; } static void aspeed_2700_scu_class_init(ObjectClass *klass, void *data) @@ -1032,7 +1032,6 @@ static const MemoryRegionOps aspeed_ast2700_scuio_ops = { }; static const uint32_t ast2700_a0_resets_io[ASPEED_AST2700_SCU_NR_REGS] = { - [AST2700_HW_STRAP1] = 0x00000504, [AST2700_HW_STRAP1_CLR] = 0xFFF0FFF0, [AST2700_HW_STRAP1_LOCK] = 0x00000FFF, [AST2700_HW_STRAP1_SEC1] = 0x000000FF,
There is one hw_strap1 register in the SCU (CPU DIE) and another hw_strap1 register in the SCUIO (IO DIE). In the "ast2700_a0_resets" function, the hardcoded value "0x00000800" is set in SCU hw-strap1 (CPU DIE), and in "ast2700_a0_resets_io" the hardcoded value "0x00000504" is set in SCUIO hw-strap1 (IO DIE). Both values cannot be set via the SOC layer. The value of "s->hw_strap1" is set by the SOC layer via the "hw-strap1" property. Update the "aspeed_ast2700_scu_reset" function to set the value of "s->hw_strap1" in both the SCU and SCUIO hw-strap1 registers. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> --- hw/misc/aspeed_scu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)