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Mon, 03 Mar 2025 09:52:46 -0800 (PST) Received: from localhost.localdomain ([58.37.175.138]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2235052beaasm80625535ad.233.2025.03.03.09.52.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 09:52:45 -0800 (PST) From: Tomita Moeko To: Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_G?= =?utf-8?q?oater?= Cc: qemu-devel@nongnu.org, =?utf-8?q?Corvin_K=C3=B6hne?= , Tomita Moeko Subject: [PATCH v2 9/9] vfio/igd: Introduce x-igd-lpc option for LPC bridge ID quirk Date: Tue, 4 Mar 2025 01:52:19 +0800 Message-ID: <20250303175220.74917-10-tomitamoeko@gmail.com> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250303175220.74917-1-tomitamoeko@gmail.com> References: <20250303175220.74917-1-tomitamoeko@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::644; envelope-from=tomitamoeko@gmail.com; helo=mail-pl1-x644.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The LPC bridge/Host bridge IDs quirk is also not dependent on legacy mode. Recent Windows driver no longer depends on these IDs, as well as Linux i915 driver, while UEFI GOP seems still needs them. Make it an option to allow users enabling and disabling it as needed. Signed-off-by: Tomita Moeko --- hw/vfio/igd.c | 14 ++++++++------ hw/vfio/pci.c | 2 ++ hw/vfio/pci.h | 3 +++ 3 files changed, 13 insertions(+), 6 deletions(-) diff --git a/hw/vfio/igd.c b/hw/vfio/igd.c index 9bfaa24c24..d3ebbebe4e 100644 --- a/hw/vfio/igd.c +++ b/hw/vfio/igd.c @@ -557,13 +557,9 @@ bool vfio_probe_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) return false; } - /* Enable OpRegion quirk */ + /* Enable OpRegion and LPC brige quirk */ vdev->features |= VFIO_FEATURE_ENABLE_IGD_OPREGION; - - /* Setup LPC bridge / Host bridge PCI IDs */ - if (!vfio_pci_igd_setup_lpc_bridge(vdev, errp)) { - return false; - } + vdev->features |= VFIO_FEATURE_ENABLE_IGD_LPC; } /* Setup OpRegion access */ @@ -572,6 +568,12 @@ bool vfio_probe_igd_config_quirk(VFIOPCIDevice *vdev, Error **errp) return false; } + /* Setup LPC bridge / Host bridge PCI IDs */ + if ((vdev->features & VFIO_FEATURE_ENABLE_IGD_LPC) && + !vfio_pci_igd_setup_lpc_bridge(vdev, errp)) { + return false; + } + /* * Allow user to override dsm size using x-igd-gms option, in multiples of * 32MiB. This option should only be used when the desired size cannot be diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 8fb415cf45..1e49c4b58b 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -3354,6 +3354,8 @@ static const Property vfio_pci_dev_properties[] = { VFIO_FEATURE_ENABLE_REQ_BIT, true), DEFINE_PROP_BIT("x-igd-opregion", VFIOPCIDevice, features, VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT, false), + DEFINE_PROP_BIT("x-igd-lpc", VFIOPCIDevice, features, + VFIO_FEATURE_ENABLE_IGD_LPC_BIT, false), DEFINE_PROP_BIT("x-igd-legacy-mode", VFIOPCIDevice, features, VFIO_FEATURE_ENABLE_IGD_LEGACY_MODE_BIT, true), DEFINE_PROP_ON_OFF_AUTO("enable-migration", VFIOPCIDevice, diff --git a/hw/vfio/pci.h b/hw/vfio/pci.h index 4bddfb80f8..dd645a5465 100644 --- a/hw/vfio/pci.h +++ b/hw/vfio/pci.h @@ -154,6 +154,9 @@ struct VFIOPCIDevice { #define VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT 2 #define VFIO_FEATURE_ENABLE_IGD_OPREGION \ (1 << VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT) +#define VFIO_FEATURE_ENABLE_IGD_LPC_BIT 3 +#define VFIO_FEATURE_ENABLE_IGD_LPC \ + (1 << VFIO_FEATURE_ENABLE_IGD_LPC_BIT) #define VFIO_FEATURE_ENABLE_IGD_LEGACY_MODE_BIT 4 #define VFIO_FEATURE_ENABLE_IGD_LEGACY_MODE \ (1 << VFIO_FEATURE_ENABLE_IGD_LEGACY_MODE_BIT)