From patchwork Fri Dec 13 04:28:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 11289931 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CABCE14BD for ; Fri, 13 Dec 2019 04:28:46 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A065624656 for ; Fri, 13 Dec 2019 04:28:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=aj.id.au header.i=@aj.id.au header.b="XY9Jy0Mo"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="rQMRRQV0" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A065624656 Authentication-Results: mail.kernel.org; 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Thu, 12 Dec 2019 23:27:19 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 12 Dec 2019 23:27:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; s=fm1; bh=zXn7cYEOSa/o4 0dnQ0SzE92heWINlABFTx7zsz1Qj1A=; b=XY9Jy0Mo4vkJE9iD/kFxaH29OVN3W I2cwxfe+upBrUo4EV41m/+iB3zHQSJN7mHu140dB1uci0AjOURCH4ypmPk0gVd6u xFhbZ5jT0rnSKMWh7WHl+6Td3I/ubftqahLPoW8WTy6pqNvRnWgJcTdTDMp4lXy2 21E/R+2Zz5V08ZUwOC6kFRn1G2mQIPv7ALjLO0Un0dTjGQVUMgqPYKep3ESUH5Za E5WNWF1k99AJUj4kwVEF2hUefGWCiX5wBkZsyb/1U7VI5VEpiVXpF/tV6XeVOUh/ gSJJxv4138KtOZcVkLTBCDWdk7PQ77ux2WuKiJ2/2Dev+8zcWQyCpKmww== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=zXn7cYEOSa/o40dnQ0SzE92heWINlABFTx7zsz1Qj1A=; b=rQMRRQV0 4dW2Mok94avZk2dTwY3A1X3J0WuMnSXxE8638K0ph6/r/qjLj+YST5BV7GaetBUM 6Hcw8aN77rZY4xrP3nq76TFlrOmOoyZoV1l0EGtm0zmVeatWqxrFNIpm8LiKVgjV 3SADrRHHR8wSGYa/0jELfVGCUK5+JRpLNNMKg1sydTrgP3N/Oe6ESH9rlttPDinh Spu2I4Ll0I7kxfDe7az+EuxxEg5YsqtJr5dOfARu05FWrgztm7w8tMqjjWnmJTxc aPUU9XuETT/ymvf49SU75UvTyR8V/d87ZO3wm7uuERRrg4C//sDSOkb6UsvPfhN1 jFPMHHEt5+2h4g== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedufedrudelkedgjedtucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomheptehnughrvgifucflvghffhgvrhihuceorghnughrvgifsegr jhdrihgurdgruheqnecukfhppedvtddvrdekuddrudekrdeftdenucfrrghrrghmpehmrg hilhhfrhhomheprghnughrvgifsegrjhdrihgurdgruhenucevlhhushhtvghrufhiiigv pedt X-ME-Proxy: Received: from mistburn.au.ibm.com (bh02i525f01.au.ibm.com [202.81.18.30]) by mail.messagingengine.com (Postfix) with ESMTPA id 6910A80064; Thu, 12 Dec 2019 23:27:16 -0500 (EST) From: Andrew Jeffery To: qemu-arm@nongnu.org Subject: [PATCH v2 2/2] hw/arm: ast2600: Wire up the eMMC controller Date: Fri, 13 Dec 2019 14:58:42 +1030 Message-Id: <23bbbd829459a9a2508c9e76f0720e428852d92d.1576211124.git-series.andrew@aj.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: References: MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 64.147.123.19 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org, clg@kaod.org, joel@jms.id.au Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Initialise another SDHCI model instance for the AST2600's eMMC controller and use the SDHCI's num_slots value introduced previously to determine whether we should create an SD card instance for the new slot. Signed-off-by: Andrew Jeffery Reviewed-by: Cédric Le Goater --- v2: * Extract instantiation of SD cards to helper function hw/arm/aspeed.c | 25 ++++++++++++++++--------- hw/arm/aspeed_ast2600.c | 21 +++++++++++++++++++++ include/hw/arm/aspeed_soc.h | 2 ++ 3 files changed, 39 insertions(+), 9 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 862549b1f3a9..87baac0ea46c 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -167,6 +167,18 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, } } +static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo) +{ + BlockBackend *blk; + DeviceState *card; + + blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; + card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), + TYPE_SD_CARD); + qdev_prop_set_drive(card, "drive", blk, &error_fatal); + object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); +} + static void aspeed_board_init(MachineState *machine, const AspeedBoardConfig *cfg) { @@ -260,16 +272,11 @@ static void aspeed_board_init(MachineState *machine, } for (i = 0; i < bmc->soc.sdhci.num_slots; i++) { - SDHCIState *sdhci = &bmc->soc.sdhci.slots[i]; - DriveInfo *dinfo = drive_get_next(IF_SD); - BlockBackend *blk; - DeviceState *card; + sdhci_attach_drive(&bmc->soc.sdhci.slots[i], drive_get_next(IF_SD)); + } - blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; - card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), - TYPE_SD_CARD); - qdev_prop_set_drive(card, "drive", blk, &error_fatal); - object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); + if (bmc->soc.emmc.num_slots) { + sdhci_attach_drive(&bmc->soc.emmc.slots[0], drive_get_next(IF_SD)); } arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 931ee5aae183..723c8196c8a5 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -46,6 +46,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { [ASPEED_ADC] = 0x1E6E9000, [ASPEED_VIDEO] = 0x1E700000, [ASPEED_SDHCI] = 0x1E740000, + [ASPEED_EMMC] = 0x1E750000, [ASPEED_GPIO] = 0x1E780000, [ASPEED_GPIO_1_8V] = 0x1E780800, [ASPEED_RTC] = 0x1E781000, @@ -64,6 +65,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = { #define ASPEED_SOC_AST2600_MAX_IRQ 128 +/* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_UART1] = 47, [ASPEED_UART2] = 48, @@ -77,6 +79,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_ADC] = 78, [ASPEED_XDMA] = 6, [ASPEED_SDHCI] = 43, + [ASPEED_EMMC] = 15, [ASPEED_GPIO] = 40, [ASPEED_GPIO_1_8V] = 11, [ASPEED_RTC] = 13, @@ -215,6 +218,14 @@ static void aspeed_soc_ast2600_init(Object *obj) sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]), sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI); } + + sysbus_init_child_obj(obj, "emmc", OBJECT(&s->emmc), sizeof(s->emmc), + TYPE_ASPEED_SDHCI); + + object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort); + + sysbus_init_child_obj(obj, "emmc[*]", OBJECT(&s->emmc.slots[0]), + sizeof(s->emmc.slots[0]), TYPE_SYSBUS_SDHCI); } /* @@ -487,6 +498,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) sc->memmap[ASPEED_SDHCI]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0, aspeed_soc_get_irq(s, ASPEED_SDHCI)); + + /* eMMC */ + object_property_set_bool(OBJECT(&s->emmc), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_EMMC]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0, + aspeed_soc_get_irq(s, ASPEED_EMMC)); } static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 495c08be1b84..911443f4c071 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -56,6 +56,7 @@ typedef struct AspeedSoCState { AspeedGPIOState gpio; AspeedGPIOState gpio_1_8v; AspeedSDHCIState sdhci; + AspeedSDHCIState emmc; } AspeedSoCState; #define TYPE_ASPEED_SOC "aspeed-soc" @@ -125,6 +126,7 @@ enum { ASPEED_MII4, ASPEED_SDRAM, ASPEED_XDMA, + ASPEED_EMMC, }; #endif /* ASPEED_SOC_H */