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Tsirkin" To: qemu-devel@nongnu.org Cc: Peter Maydell , yeeli , Jason Wang , Yi Liu , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Subject: [PULL 19/19] intel_iommu: Fix for IQA reg read dropped DW field Message-ID: <515457757ff8540c524ff39ea1d9564b251c6532.1722508478.git.mst@redhat.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-Mailer: git-send-email 2.27.0.106.g8ac3dc51b1 X-Mutt-Fcc: =sent Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.131, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: yeeli If VT-D hardware supports scalable mode, Linux will set the IQA DW field (bit11). In qemu, the vtd_mem_write and vtd_update_iq_dw set DW field well. However, vtd_mem_read the DW field wrong because "& VTD_IQA_QS" dropped the value of DW. Replace "&VTD_IQA_QS" with "& (VTD_IQA_QS | VTD_IQA_DW_MASK)" could save the DW field. Test patch as below: config the "x-scalable-mode" option: "-device intel-iommu,caching-mode=on,x-scalable-mode=on,aw-bits=48" After Linux OS boot, check the IQA_REG DW Field by usage 1 or 2: 1. IOMMU_DEBUGFS: Before fix: cat /sys/kernel/debug/iommu/intel/iommu_regset |grep IQA IQA 0x90 0x00000001001da001 After fix: cat /sys/kernel/debug/iommu/intel/iommu_regset |grep IQA IQA 0x90 0x00000001001da801 Check DW field(bit11) is 1. 2. devmem2 read the IQA_REG (offset 0x90): Before fix: devmem2 0xfed90090 /dev/mem opened. Memory mapped at address 0x7f72c795b000. Value at address 0xFED90090 (0x7f72c795b090): 0x1DA001 After fix: devmem2 0xfed90090 /dev/mem opened. Memory mapped at address 0x7fc95281c000. Value at address 0xFED90090 (0x7fc95281c090): 0x1DA801 Check DW field(bit11) is 1. Signed-off-by: yeeli Message-Id: <20240725031858.1529902-1-seven.yi.lee@gmail.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/intel_iommu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 9a768f0b44..16d2885fcc 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2947,7 +2947,9 @@ static uint64_t vtd_mem_read(void *opaque, hwaddr addr, unsigned size) /* Invalidation Queue Address Register, 64-bit */ case DMAR_IQA_REG: - val = s->iq | (vtd_get_quad(s, DMAR_IQA_REG) & VTD_IQA_QS); + val = s->iq | + (vtd_get_quad(s, DMAR_IQA_REG) & + (VTD_IQA_QS | VTD_IQA_DW_MASK)); if (size == 4) { val = val & ((1ULL << 32) - 1); }