From patchwork Thu Apr 23 04:13:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elena Ufimtseva X-Patchwork-Id: 11504935 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A54901575 for ; Thu, 23 Apr 2020 04:19:40 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 691C62075A for ; Thu, 23 Apr 2020 04:19:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=oracle.com header.i=@oracle.com header.b="PrIvPRpP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 691C62075A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=oracle.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35424 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jRTKt-0008Jd-GR for patchwork-qemu-devel@patchwork.kernel.org; Thu, 23 Apr 2020 00:19:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49584) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jRTGb-0000ao-Ug for qemu-devel@nongnu.org; Thu, 23 Apr 2020 00:15:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.90_1) (envelope-from ) id 1jRTGa-0007Z0-P6 for qemu-devel@nongnu.org; Thu, 23 Apr 2020 00:15:13 -0400 Received: from userp2130.oracle.com ([156.151.31.86]:54948) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jRTGa-0007X8-34 for qemu-devel@nongnu.org; Thu, 23 Apr 2020 00:15:12 -0400 Received: from pps.filterd (userp2130.oracle.com [127.0.0.1]) by userp2130.oracle.com (8.16.0.42/8.16.0.42) with SMTP id 03N4CbI0064340; Thu, 23 Apr 2020 04:15:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=corp-2020-01-29; bh=HlSt6QdcTtKGRvNZ/wEzDIOOh6RcCG6/d7Efae8lftQ=; b=PrIvPRpPEwQBBGggE1xE41UnytVnyermBjx629VuLwXyvCkuMd0JI9Z3533UimFV1HXC 1XIv8N47JqGRYEMMJBwZF8j04HCS5ioi0SohmFQCBqmoD/2LlzCHmAettw9Sh8u4zgTQ NKBIwB/YzxrUCQZyYc/XkgdOgw9ugPI+N0XIgHNj0G0Az9nZ72yntnCD+NUheuF9l9nf fLwOBeKpnL/+fTo67QZ4BCbT9gS22eXbgBUzZg1DWHgcwJNFH1Ge/87kJadGoDji5QCL 7aHFbRMCmZvw1ZZWm4PM/xUI8rlcLzfSl5fUMfcau36yxGrGgzUc/KCKPqTOLmdqWoeH Og== Received: from aserp3030.oracle.com (aserp3030.oracle.com [141.146.126.71]) by userp2130.oracle.com with ESMTP id 30grpgtrt7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 23 Apr 2020 04:15:05 +0000 Received: from pps.filterd (aserp3030.oracle.com [127.0.0.1]) by aserp3030.oracle.com (8.16.0.42/8.16.0.42) with SMTP id 03N4Bl8J093939; Thu, 23 Apr 2020 04:15:04 GMT Received: from aserv0121.oracle.com (aserv0121.oracle.com [141.146.126.235]) by aserp3030.oracle.com with ESMTP id 30gb3ux0q5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 23 Apr 2020 04:15:04 +0000 Received: from abhmp0020.oracle.com (abhmp0020.oracle.com [141.146.116.26]) by aserv0121.oracle.com (8.14.4/8.13.8) with ESMTP id 03N4F36d017809; Thu, 23 Apr 2020 04:15:03 GMT Received: from flaka.hsd1.ca.comcast.net (/67.180.143.163) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 22 Apr 2020 21:15:03 -0700 From: elena.ufimtseva@oracle.com To: qemu-devel@nongnu.org Subject: [PATCH RESEND v6 21/36] multi-process: PCI BAR read/write handling for proxy & remote endpoints Date: Wed, 22 Apr 2020 21:13:56 -0700 Message-Id: <5484f5bc8b9e80d50331b32b971f433b5c062e3a.1587614626.git.elena.ufimtseva@oracle.com> X-Mailer: git-send-email 2.25.GIT In-Reply-To: References: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9599 signatures=668686 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 malwarescore=0 spamscore=0 adultscore=0 mlxlogscore=999 phishscore=0 suspectscore=1 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004230027 X-Proofpoint-Virus-Version: vendor=nai engine=6000 definitions=9599 signatures=668686 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 adultscore=0 suspectscore=1 bulkscore=0 clxscore=1015 malwarescore=0 phishscore=0 spamscore=0 priorityscore=1501 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004230027 Received-SPF: pass client-ip=156.151.31.86; envelope-from=elena.ufimtseva@oracle.com; helo=userp2130.oracle.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/04/23 00:14:28 X-ACL-Warn: Detected OS = Linux 3.x [generic] [fuzzy] X-Received-From: 156.151.31.86 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: elena.ufimtseva@oracle.com, fam@euphon.net, swapnil.ingle@nutanix.com, john.g.johnson@oracle.com, kraxel@redhat.com, jag.raman@oracle.com, quintela@redhat.com, mst@redhat.com, armbru@redhat.com, kanth.ghatraju@oracle.com, felipe@nutanix.com, thuth@redhat.com, ehabkost@redhat.com, konrad.wilk@oracle.com, dgilbert@redhat.com, liran.alon@oracle.com, stefanha@redhat.com, thanos.makatos@nutanix.com, rth@twiddle.net, kwolf@redhat.com, berrange@redhat.com, mreitz@redhat.com, ross.lagerwall@citrix.com, marcandre.lureau@gmail.com, pbonzini@redhat.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Jagannathan Raman Proxy device object implements handler for PCI BAR writes and reads. The handler uses BAR_WRITE/BAR_READ message to communicate to the remote process with the BAR address and value to be written/read. The remote process implements handler for BAR_WRITE/BAR_READ message. Signed-off-by: Jagannathan Raman Signed-off-by: Elena Ufimtseva Signed-off-by: John G Johnson --- hw/proxy/qemu-proxy.c | 64 ++++++++++++++++++++++++++ include/hw/proxy/qemu-proxy.h | 20 ++++++++- include/io/mpqemu-link.h | 12 +++++ io/mpqemu-link.c | 6 +++ remote/remote-main.c | 84 +++++++++++++++++++++++++++++++++++ 5 files changed, 184 insertions(+), 2 deletions(-) diff --git a/hw/proxy/qemu-proxy.c b/hw/proxy/qemu-proxy.c index 87cf39c672..7fd0a312a5 100644 --- a/hw/proxy/qemu-proxy.c +++ b/hw/proxy/qemu-proxy.c @@ -169,3 +169,67 @@ static void pci_proxy_dev_register_types(void) type_init(pci_proxy_dev_register_types) +static void send_bar_access_msg(PCIProxyDev *dev, MemoryRegion *mr, + bool write, hwaddr addr, uint64_t *val, + unsigned size, bool memory) +{ + MPQemuLinkState *mpqemu_link = dev->mpqemu_link; + MPQemuMsg msg; + int wait; + + memset(&msg, 0, sizeof(MPQemuMsg)); + + msg.bytestream = 0; + msg.size = sizeof(msg.data1); + msg.data1.bar_access.addr = mr->addr + addr; + msg.data1.bar_access.size = size; + msg.data1.bar_access.memory = memory; + + if (write) { + msg.cmd = BAR_WRITE; + msg.data1.bar_access.val = *val; + } else { + wait = GET_REMOTE_WAIT; + + msg.cmd = BAR_READ; + msg.num_fds = 1; + msg.fds[0] = wait; + } + + mpqemu_msg_send(&msg, mpqemu_link->dev); + + if (!write) { + *val = wait_for_remote(wait); + PUT_REMOTE_WAIT(wait); + } +} + +void proxy_default_bar_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) +{ + ProxyMemoryRegion *pmr = opaque; + + send_bar_access_msg(pmr->dev, &pmr->mr, true, addr, &val, size, + pmr->memory); +} + +uint64_t proxy_default_bar_read(void *opaque, hwaddr addr, unsigned size) +{ + ProxyMemoryRegion *pmr = opaque; + uint64_t val; + + send_bar_access_msg(pmr->dev, &pmr->mr, false, addr, &val, size, + pmr->memory); + + return val; +} + +const MemoryRegionOps proxy_default_ops = { + .read = proxy_default_bar_read, + .write = proxy_default_bar_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, +}; diff --git a/include/hw/proxy/qemu-proxy.h b/include/hw/proxy/qemu-proxy.h index d7eaf26f29..9e4127eccb 100644 --- a/include/hw/proxy/qemu-proxy.h +++ b/include/hw/proxy/qemu-proxy.h @@ -26,14 +26,25 @@ #define PCI_PROXY_DEV_GET_CLASS(obj) \ OBJECT_GET_CLASS(PCIProxyDevClass, (obj), TYPE_PCI_PROXY_DEV) -typedef struct PCIProxyDev { +typedef struct PCIProxyDev PCIProxyDev; + +typedef struct ProxyMemoryRegion { + PCIProxyDev *dev; + MemoryRegion mr; + bool memory; + bool present; + uint8_t type; +} ProxyMemoryRegion; + +struct PCIProxyDev { PCIDevice parent_dev; MPQemuLinkState *mpqemu_link; int socket; -} PCIProxyDev; + ProxyMemoryRegion region[PCI_NUM_REGIONS]; +}; typedef struct PCIProxyDevClass { PCIDeviceClass parent_class; @@ -43,4 +54,9 @@ typedef struct PCIProxyDevClass { char *command; } PCIProxyDevClass; +void proxy_default_bar_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size); + +uint64_t proxy_default_bar_read(void *opaque, hwaddr addr, unsigned size); + #endif /* QEMU_PROXY_H */ diff --git a/include/io/mpqemu-link.h b/include/io/mpqemu-link.h index 7228a1915e..41cf092f9e 100644 --- a/include/io/mpqemu-link.h +++ b/include/io/mpqemu-link.h @@ -31,6 +31,8 @@ /** * mpqemu_cmd_t: * SYNC_SYSMEM Shares QEMU's RAM with remote device's RAM + * BAR_WRITE Writes to PCI BAR region + * BAR_READ Reads from PCI BAR region * * proc_cmd_t enum type to specify the command to be executed on the remote * device. @@ -41,6 +43,8 @@ typedef enum { CONNECT_DEV, PCI_CONFIG_WRITE, PCI_CONFIG_READ, + BAR_WRITE, + BAR_READ, MAX, } mpqemu_cmd_t; @@ -56,6 +60,13 @@ typedef struct { ram_addr_t offsets[REMOTE_MAX_FDS]; } sync_sysmem_msg_t; +typedef struct { + hwaddr addr; + uint64_t val; + unsigned size; + bool memory; +} bar_access_msg_t; + /** * MPQemuMsg: * @cmd: The remote command @@ -78,6 +89,7 @@ typedef struct { union { uint64_t u64; sync_sysmem_msg_t sync_sysmem; + bar_access_msg_t bar_access; } data1; int fds[REMOTE_MAX_FDS]; diff --git a/io/mpqemu-link.c b/io/mpqemu-link.c index ef4a07b81a..5cb93fc47b 100644 --- a/io/mpqemu-link.c +++ b/io/mpqemu-link.c @@ -387,6 +387,12 @@ bool mpqemu_msg_valid(MPQemuMsg *msg) return false; } break; + case BAR_WRITE: + case BAR_READ: + if (msg->size != sizeof(msg->data1)) { + return false; + } + break; default: break; } diff --git a/remote/remote-main.c b/remote/remote-main.c index 834574e172..0990509f7a 100644 --- a/remote/remote-main.c +++ b/remote/remote-main.c @@ -34,6 +34,7 @@ #include "block/block.h" #include "exec/ramlist.h" #include "remote/remote-common.h" +#include "exec/memattrs.h" static void process_msg(GIOCondition cond, MPQemuLinkState *link, MPQemuChannel *chan); @@ -114,6 +115,77 @@ exit: notify_proxy(wait, ret); } +/* TODO: confirm memtx attrs. */ +static void process_bar_write(MPQemuMsg *msg, Error **errp) +{ + bar_access_msg_t *bar_access = &msg->data1.bar_access; + AddressSpace *as = + bar_access->memory ? &address_space_memory : &address_space_io; + MemTxResult res; + + assert(is_power_of_2(bar_access->size) && + bar_access->size <= sizeof(uint64_t)); + + res = address_space_rw(as, bar_access->addr, MEMTXATTRS_UNSPECIFIED, + (uint8_t *)&bar_access->val, bar_access->size, + true); + + if (res != MEMTX_OK) { + error_setg(errp, "Could not perform address space write operation," + " inaccessible address: %lx in pid %d, %s.", + bar_access->addr, getpid(), __progname); + } +} + +static void process_bar_read(MPQemuMsg *msg, Error **errp) +{ + bar_access_msg_t *bar_access = &msg->data1.bar_access; + AddressSpace *as; + int wait = msg->fds[0]; + MemTxResult res; + uint64_t val = 0; + + as = bar_access->memory ? &address_space_memory : &address_space_io; + + assert(is_power_of_2(bar_access->size) && + bar_access->size <= sizeof(uint64_t)); + + res = address_space_rw(as, bar_access->addr, MEMTXATTRS_UNSPECIFIED, + (uint8_t *)&val, bar_access->size, false); + + if (res != MEMTX_OK) { + error_setg(errp, "Could not perform address space read operation," + " inaccessible address: %lx in pid %d, %s.", + bar_access->addr, getpid(), __progname); + val = (uint64_t)-1; + goto fail; + } + + switch (bar_access->size) { + case 8: + /* Nothing to do as val is already 8 bytes long */ + break; + case 4: + val = *((uint32_t *)&val); + break; + case 2: + val = *((uint16_t *)&val); + break; + case 1: + val = *((uint8_t *)&val); + break; + default: + error_setg(errp, "Invalid PCI BAR read size in pid %d, %s", + getpid(), __progname); + return; + } + +fail: + notify_proxy(wait, val); + + PUT_REMOTE_WAIT(wait); +} + static void process_msg(GIOCondition cond, MPQemuLinkState *link, MPQemuChannel *chan) { @@ -147,6 +219,18 @@ static void process_msg(GIOCondition cond, MPQemuLinkState *link, case PCI_CONFIG_READ: process_config_read(LINK_TO_DEV(link), msg); break; + case BAR_WRITE: + process_bar_write(msg, &err); + if (err) { + goto finalize_loop; + } + break; + case BAR_READ: + process_bar_read(msg, &err); + if (err) { + goto finalize_loop; + } + break; default: error_setg(&err, "Unknown command in %s", print_pid_exec(pid_exec)); goto finalize_loop;