[RFC,v3,21/78] target/sparc: add fallthrough pseudo-keyword

Commit Message

Manos Pitsidianakis Oct. 13, 2023, 8:45 a.m. UTC

In preparation of raising -Wimplicit-fallthrough to 5, replace all
fall-through comments with the fallthrough attribute pseudo-keyword.

Signed-off-by: Emmanouil Pitsidianakis <[e-mail]>
---
 target/sparc/ldst_helper.c | 4 ++--
 target/sparc/mmu_helper.c  | 6 +++---
 target/sparc/translate.c   | 3 ++-
 target/sparc/win_helper.c  | 1 +
 4 files changed, 8 insertions(+), 6 deletions(-)

Patch

diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 78b03308ae..b233e40da5 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -1522,7 +1522,7 @@  uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr,
             /* Hyperprivileged access only */
             sparc_raise_mmu_fault(cs, addr, false, false, 1, size, GETPC());
         }
-        /* fall through */
+        fallthrough;
     case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
         {
             unsigned int i = (addr >> 3) & 0x7;
@@ -1865,7 +1865,7 @@  void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,
             /* Hyperprivileged access only */
             sparc_raise_mmu_fault(cs, addr, true, false, 1, size, GETPC());
         }
-        /* fall through */
+        fallthrough;
     case ASI_HYP_SCRATCHPAD: /* UA2005 hyperprivileged scratchpad */
         {
             unsigned int i = (addr >> 3) & 0x7;
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 453498c670..13f0430c5d 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -558,13 +558,13 @@  static int get_physical_address_data(CPUSPARCState *env, CPUTLBEntryFull *full,
         g_assert_not_reached();
     case MMU_USER_IDX:
         is_user = true;
-        /* fallthru */
+        fallthrough;
     case MMU_KERNEL_IDX:
         context = env->dmmu.mmu_primary_context & 0x1fff;
         break;
     case MMU_USER_SECONDARY_IDX:
         is_user = true;
-        /* fallthru */
+        fallthrough;
     case MMU_KERNEL_SECONDARY_IDX:
         context = env->dmmu.mmu_secondary_context & 0x1fff;
         break;
@@ -657,7 +657,7 @@  static int get_physical_address_code(CPUSPARCState *env, CPUTLBEntryFull *full,
         g_assert_not_reached();
     case MMU_USER_IDX:
         is_user = true;
-        /* fallthru */
+        fallthrough;
     case MMU_KERNEL_IDX:
         context = env->dmmu.mmu_primary_context & 0x1fff;
         break;
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index f92ff80ac8..4f179473d7 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -1123,6 +1123,7 @@  static void gen_compare(DisasCompare *cmp, bool xcc, unsigned int cond,
         gen_helper_compute_psr(tcg_env);
         dc->cc_op = CC_OP_FLAGS;
         /* FALLTHRU */
+        fallthrough;
 
     case CC_OP_FLAGS:
         /* We're going to generate a boolean result.  */
@@ -2204,7 +2205,7 @@  static void gen_st_asi(DisasContext *dc, TCGv src, TCGv addr,
         /* in OpenSPARC T1+ CPUs TWINX ASIs in store instructions
          * are ST_BLKINIT_ ASIs */
 #endif
-        /* fall through */
+        fallthrough;
     case GET_ASI_DIRECT:
         gen_address_mask(dc, addr);
         tcg_gen_qemu_st_tl(src, addr, da.mem_idx, da.memop | MO_ALIGN);
diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c
index 3a7c0ff943..0c54b63938 100644
--- a/target/sparc/win_helper.c
+++ b/target/sparc/win_helper.c
@@ -303,6 +303,7 @@  static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate)
     default:
         trace_win_helper_gregset_error(pstate);
         /* fall through to normal set of global registers */
+        fallthrough;
     case 0:
         return env->bgregs;
     case PS_AG: