From patchwork Mon Feb 15 11:18:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Christophe Dubois X-Patchwork-Id: 8313281 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 89A269F372 for ; Mon, 15 Feb 2016 11:19:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E0F0A2035E for ; Mon, 15 Feb 2016 11:19:31 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 22F9B20340 for ; Mon, 15 Feb 2016 11:19:31 +0000 (UTC) Received: from localhost ([::1]:59159 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aVHBi-0002SN-Fn for patchwork-qemu-devel@patchwork.kernel.org; Mon, 15 Feb 2016 06:19:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39060) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aVHAO-0000fw-NP for qemu-devel@nongnu.org; Mon, 15 Feb 2016 06:18:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aVHAL-0001m8-F3 for qemu-devel@nongnu.org; Mon, 15 Feb 2016 06:18:08 -0500 Received: from zose-mta05.web4all.fr ([185.49.20.50]:48983) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aVHAL-0001ls-4B for qemu-devel@nongnu.org; Mon, 15 Feb 2016 06:18:05 -0500 Received: from localhost (localhost [127.0.0.1]) by zose-mta05.web4all.fr (Postfix) with ESMTP id 0DC7D43773; Mon, 15 Feb 2016 12:18:04 +0100 (CET) Received: from zose-mta05.web4all.fr ([127.0.0.1]) by localhost (zose-mta05.web4all.fr [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id FiCqgpTlQ10s; Mon, 15 Feb 2016 12:18:03 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zose-mta05.web4all.fr (Postfix) with ESMTP id A041043EB7; Mon, 15 Feb 2016 12:18:03 +0100 (CET) X-Virus-Scanned: amavisd-new at zose-mta-05.w4a.fr Received: from zose-mta05.web4all.fr ([127.0.0.1]) by localhost (zose-mta05.web4all.fr [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id jrXyWZenE9oP; Mon, 15 Feb 2016 12:18:03 +0100 (CET) Received: from localhost.localdomain (smm49-1-78-235-240-156.fbx.proxad.net [78.235.240.156]) by zose-mta05.web4all.fr (Postfix) with ESMTPSA id 4883343773; Mon, 15 Feb 2016 12:18:03 +0100 (CET) From: Jean-Christophe Dubois To: qemu-devel@nongnu.org, peter.maydell@linaro.org, mar.krzeminski@gmail.com, crosthwaite.peter@gmail.com Date: Mon, 15 Feb 2016 12:18:02 +0100 Message-Id: <6f73b4b08f864d8f19132e8a7d14a5f1c2f1e174.1455534309.git.jcd@tribudubois.net> X-Mailer: git-send-email 2.5.0 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 185.49.20.50 Cc: Jean-Christophe Dubois Subject: [Qemu-devel] [PATCH v2 3/4] i.MX: Add SPI controllers to i.MX6 SOC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This allows Linux to boot without hanging on SPI access. Signed-off-by: Jean-Christophe Dubois Reviewed-by: Peter Maydell --- Changes since V1: * None hw/arm/fsl-imx6.c | 32 ++++++++++++++++++++++++++++++++ include/hw/arm/fsl-imx6.h | 3 +++ 2 files changed, 35 insertions(+) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 0faae27..c5c8fdc 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -78,6 +78,11 @@ static void fsl_imx6_init(Object *obj) object_initialize(&s->esdhc[i], sizeof(s->esdhc[i]), TYPE_SYSBUS_SDHCI); qdev_set_parent_bus(DEVICE(&s->esdhc[i]), sysbus_get_default()); } + + for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) { + object_initialize(&s->spi[i], sizeof(s->spi[i]), TYPE_IMX_SPI); + qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default()); + } } static void fsl_imx6_realize(DeviceState *dev, Error **errp) @@ -339,6 +344,33 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) esdhc_table[i].irq)); } + /* Initialize all ECSPI */ + for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) { + static const struct { + hwaddr addr; + unsigned int irq; + } spi_table[FSL_IMX6_NUM_ECSPIS] = { + { FSL_IMX6_eCSPI1_ADDR, FSL_IMX6_ECSPI1_IRQ }, + { FSL_IMX6_eCSPI2_ADDR, FSL_IMX6_ECSPI2_IRQ }, + { FSL_IMX6_eCSPI3_ADDR, FSL_IMX6_ECSPI3_IRQ }, + { FSL_IMX6_eCSPI4_ADDR, FSL_IMX6_ECSPI4_IRQ }, + { FSL_IMX6_eCSPI5_ADDR, FSL_IMX6_ECSPI5_IRQ }, + }; + + /* Initialize the SPI */ + object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + /* Map SPI memory */ + sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr); + /* Connect SPI IRQ to PIC */ + sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0, + qdev_get_gpio_in(DEVICE(&s->a9mpcore), + spi_table[i].irq)); + } + /* ROM memory */ memory_region_init_rom_device(&s->rom, NULL, NULL, NULL, "imx6.rom", FSL_IMX6_ROM_SIZE, &err); diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 301812d..d24aaee 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -27,6 +27,7 @@ #include "hw/i2c/imx_i2c.h" #include "hw/gpio/imx_gpio.h" #include "hw/sd/sdhci.h" +#include "hw/ssi/imx_spi.h" #include "exec/memory.h" #define TYPE_FSL_IMX6 "fsl,imx6" @@ -38,6 +39,7 @@ #define FSL_IMX6_NUM_I2CS 3 #define FSL_IMX6_NUM_GPIOS 7 #define FSL_IMX6_NUM_ESDHCS 4 +#define FSL_IMX6_NUM_ECSPIS 5 typedef struct FslIMX6State { /*< private >*/ @@ -54,6 +56,7 @@ typedef struct FslIMX6State { IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; + IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; MemoryRegion rom; MemoryRegion caam; MemoryRegion ocram;