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Ip=[149.199.60.100]; Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB2875 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.34.51 Subject: [Qemu-devel] [PATCH v1 2/2] xlnx-ep108: Connect the AXI GPIO device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, alistair23@gmail.com, edgar.iglesias@gmail.com, alistair.francis@xilinx.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Connect the new Xilinx AXI GPIO devices based on the defaults used in the ZCU102 reference board design. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias --- hw/arm/xlnx-ep108.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c index 4ec590a..23b3d6e 100644 --- a/hw/arm/xlnx-ep108.c +++ b/hw/arm/xlnx-ep108.c @@ -20,14 +20,27 @@ #include "qemu-common.h" #include "cpu.h" #include "hw/arm/xlnx-zynqmp.h" +#include "hw/gpio/xlnx-axi-gpio.h" #include "hw/boards.h" #include "qemu/error-report.h" #include "exec/address-spaces.h" #include "qemu/log.h" +#define XLNX_EP108_NUM_AXI_GPIOS 7 + +/* These can always be changed, but these seven are the default in the reference + * board design. + */ +static const uint64_t axi_gpio_addr[XLNX_EP108_NUM_AXI_GPIOS] = { + 0xa1000000, 0x401000000, 0x1001000000, 0xb1000000, 0x501000000, + 0x4801000000, 0x81000000, +}; + typedef struct XlnxEP108 { XlnxZynqMPState soc; MemoryRegion ddr_ram; + + XlnxAXIGPIO axi_gpio[XLNX_EP108_NUM_AXI_GPIOS]; } XlnxEP108; static struct arm_boot_info xlnx_ep108_binfo; @@ -106,6 +119,19 @@ static void xlnx_ep108_init(MachineState *machine) sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line); } + /* Connect the GPIO devices. These aren't on the board, but they are in + * the PL, so we connect them here instead of in the SoC. + */ + for (i = 0; i < XLNX_EP108_NUM_AXI_GPIOS; i++) { + object_initialize(&s->axi_gpio[i], sizeof(s->axi_gpio[i]), + TYPE_XLNX_AXI_GPIO); + qdev_set_parent_bus(DEVICE(&s->axi_gpio[i]), sysbus_get_default()); + + object_property_set_bool(OBJECT(&s->axi_gpio[i]), true, "realized", &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->axi_gpio[i]), 0, axi_gpio_addr[i]); + /* The device supports interrupts, but they aren't connected */ + } + xlnx_ep108_binfo.ram_size = ram_size; xlnx_ep108_binfo.kernel_filename = machine->kernel_filename; xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;