From patchwork Thu Jul 13 04:38:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Nikunj A. Dadhania" X-Patchwork-Id: 9837679 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9E92060393 for ; Thu, 13 Jul 2017 04:39:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 79A7E285F9 for ; Thu, 13 Jul 2017 04:39:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6BC52286F1; Thu, 13 Jul 2017 04:39:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 60B8E285F9 for ; Thu, 13 Jul 2017 04:39:24 +0000 (UTC) Received: from localhost ([::1]:57154 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVVuN-0008Ny-Vp for patchwork-qemu-devel@patchwork.kernel.org; Thu, 13 Jul 2017 00:39:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35729) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVVth-0008Kw-NY for qemu-devel@nongnu.org; Thu, 13 Jul 2017 00:38:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dVVtd-0006Qh-90 for qemu-devel@nongnu.org; Thu, 13 Jul 2017 00:38:41 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:46550 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dVVtd-0006PI-3U for qemu-devel@nongnu.org; Thu, 13 Jul 2017 00:38:37 -0400 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v6D4YCq8069261 for ; Thu, 13 Jul 2017 00:38:35 -0400 Received: from e23smtp06.au.ibm.com (e23smtp06.au.ibm.com [202.81.31.148]) by mx0b-001b2d01.pphosted.com with ESMTP id 2bnt3pxwb4-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 13 Jul 2017 00:38:34 -0400 Received: from localhost by e23smtp06.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 13 Jul 2017 14:38:28 +1000 Received: from d23av02.au.ibm.com (d23av02.au.ibm.com [9.190.235.138]) by d23relay07.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v6D4cSH325624802; Thu, 13 Jul 2017 14:38:28 +1000 Received: from d23av02.au.ibm.com (localhost [127.0.0.1]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v6D4cJ79024920; Thu, 13 Jul 2017 14:38:19 +1000 Received: from abhimanyu.vnet.linux.ibm.com ([9.85.73.60]) by d23av02.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v6D4c5Fw024489 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Thu, 13 Jul 2017 14:38:11 +1000 From: Nikunj A Dadhania To: David Gibson In-Reply-To: <20170609102714.GK26521@umbus.fritz.box> References: <20170608063608.17855-1-nikunj@linux.vnet.ibm.com> <20170609020141.GB26521@umbus.fritz.box> <87mv9heota.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me> <20170609102714.GK26521@umbus.fritz.box> Date: Thu, 13 Jul 2017 10:08:13 +0530 MIME-Version: 1.0 X-TM-AS-MML: disable x-cbid: 17071304-0040-0000-0000-00000347ECB9 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17071304-0041-0000-0000-00000CC376E8 Message-Id: <87eftlar4a.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-07-13_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1706020000 definitions=main-1707130068 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: Re: [Qemu-devel] [PATCH RFC] spapr: ignore interrupts during reset state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, bharata@linux.vnet.ibm.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, rth@twiddle.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP David Gibson writes: > On Fri, Jun 09, 2017 at 10:32:25AM +0530, Nikunj A Dadhania wrote: >> David Gibson writes: >> >> > On Thu, Jun 08, 2017 at 12:06:08PM +0530, Nikunj A Dadhania wrote: >> >> Rebooting a SMP TCG guest is broken for both single/multi threaded TCG. >> > >> > Ouch. When exactly did this happen? >> >> Broken since long >> >> > I know that smp boot used to work under TCG, albeit very slowly. >> >> SMP boot works, its the reboot issued from the guest doesn't boot and >> crashes in SLOF. > > Oh, sorry, I misunderstood. > >> >> >> When reset happens, all the CPUs are in halted state. First CPU is brought out >> >> of reset and secondary CPUs would be initialized by the guest kernel using a >> >> rtas call start-cpu. >> >> >> >> However, in case of TCG, decrementer interrupts keep on coming and waking the >> >> secondary CPUs up. >> > >> > Ok.. how is that happening given that the secondary CPUs should have >> > MSR[EE] == 0? >> >> Basically, the CPU is in halted condition and has_work() does not check >> for MSR_EE in that case. But I am not sure if checking MSR_EE is >> sufficient, as the CPU does go to halted state (idle) while running as >> well. > > Ok, but we definitely should be able to fix this without new > variables. If we can quiesce the secondary CPUs for the first boot, > we should be able to duplicate that for subsequent boots. How about the following, we do not report work until MSR_EE is disabled: Regards Nikunj Tested-by: Cédric Le Goater diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 783bf98..2cac98a 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8527,6 +8527,9 @@ static bool cpu_has_work_POWER7(CPUState *cs) CPUPPCState *env = &cpu->env; if (cs->halted) { + if (!msr_ee) { + return false; + } if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { return false; } @@ -8684,6 +8687,9 @@ static bool cpu_has_work_POWER8(CPUState *cs) CPUPPCState *env = &cpu->env; if (cs->halted) { + if (!msr_ee) { + return false; + } if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { return false; } @@ -8865,6 +8871,9 @@ static bool cpu_has_work_POWER9(CPUState *cs) CPUPPCState *env = &cpu->env; if (cs->halted) { + if (!msr_ee) { + return false; + } if (!(cs->interrupt_request & CPU_INTERRUPT_HARD)) { return false; }