diff mbox series

[11/19] util/cacheflush.c: Update cache flushing mechanism for Emscripten

Message ID 97a2164b3f428265136bb1c01615a16b516138c2.1744787186.git.ktokunaga.mail@gmail.com (mailing list archive)
State New
Headers show
Series Enable QEMU TCI to run 32bit guests on browsers | expand

Commit Message

Kohei Tokunaga April 16, 2025, 8:14 a.m. UTC
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
---
 include/qemu/cacheflush.h | 3 ++-
 util/cacheflush.c         | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

Comments

Philippe Mathieu-Daudé April 16, 2025, 9:37 a.m. UTC | #1
The "why?" isn't clearly described.

On 16/4/25 10:14, Kohei Tokunaga wrote:
> Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
> ---
>   include/qemu/cacheflush.h | 3 ++-
>   util/cacheflush.c         | 3 ++-
>   2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/include/qemu/cacheflush.h b/include/qemu/cacheflush.h
> index ae20bcda73..84969801e3 100644
> --- a/include/qemu/cacheflush.h
> +++ b/include/qemu/cacheflush.h
> @@ -19,7 +19,8 @@
>    * mappings of the same physical page(s).
>    */
>   
> -#if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
> +#if defined(__i386__) || defined(__x86_64__) || defined(__s390__) \
> +    || defined(EMSCRIPTEN)
>   
>   static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
>   {
> diff --git a/util/cacheflush.c b/util/cacheflush.c
> index 1d12899a39..e5aa256cd8 100644
> --- a/util/cacheflush.c
> +++ b/util/cacheflush.c
> @@ -225,7 +225,8 @@ static void __attribute__((constructor)) init_cache_info(void)
>    * Architecture (+ OS) specific cache flushing mechanisms.
>    */
>   
> -#if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
> +#if defined(__i386__) || defined(__x86_64__) || defined(__s390__) || \
> +    defined(EMSCRIPTEN)
>   
>   /* Caches are coherent and do not require flushing; symbol inline. */
>
Kohei Tokunaga April 17, 2025, 9:27 a.m. UTC | #2
Hi Philippe,

> The "why?" isn't clearly described.

Although __builtin___clear_cache is used to flush the instruction cache for
a specified memory region[1], this operation doesn't apply to wasm, as its
memory isn't executable. Moreover, Emscripten does not support this builtin
and fails to compile it with the following error.

> fatal error: error in backend: llvm.clear_cache is not supported on wasm

To resolve this, I've removed the call to __builtin___clear_cache.

I'll update this patch to include an explicit "#elif" branch with an
explanation, like the following:

+#elif defined(EMSCRIPTEN)
+
+/* Wasm does not have an executable memory region. */
+

Please let me know if I'm missing something or if there is a preferred way
to handle this case.

[1]
https://gcc.gnu.org/onlinedocs/gcc-14.2.0/gcc/Other-Builtins.html#index-_005f_005fbuiltin_005f_005f_005fclear_005fcache
Philippe Mathieu-Daudé April 17, 2025, 9:50 a.m. UTC | #3
On 17/4/25 11:27, Kohei Tokunaga wrote:
> Hi Philippe,
> 
>  > The "why?" isn't clearly described.
> 

I'm happy with the following ...

> Although __builtin___clear_cache is used to flush the instruction cache for
> a specified memory region[1], this operation doesn't apply to wasm, as its
> memory isn't executable. Moreover, Emscripten does not support this builtin
> and fails to compile it with the following error.
> 
>  > fatal error: error in backend: llvm.clear_cache is not supported on wasm
> 
> To resolve this, I've removed the call to __builtin___clear_cache.

... used as commit description,

> 
> I'll update this patch to include an explicit "#elif" branch with an
> explanation, like the following:
> 
> +#elif defined(EMSCRIPTEN)
> +
> +/* Wasm does not have an executable memory region. */
> +

and this comment in the code. Thanks!

> 
> Please let me know if I'm missing something or if there is a preferred way
> to handle this case.
> 
> [1] https://gcc.gnu.org/onlinedocs/gcc-14.2.0/gcc/Other- 
> Builtins.html#index-_005f_005fbuiltin_005f_005f_005fclear_005fcache 
> <https://gcc.gnu.org/onlinedocs/gcc-14.2.0/gcc/Other- 
> Builtins.html#index-_005f_005fbuiltin_005f_005f_005fclear_005fcache>
>
diff mbox series

Patch

diff --git a/include/qemu/cacheflush.h b/include/qemu/cacheflush.h
index ae20bcda73..84969801e3 100644
--- a/include/qemu/cacheflush.h
+++ b/include/qemu/cacheflush.h
@@ -19,7 +19,8 @@ 
  * mappings of the same physical page(s).
  */
 
-#if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
+#if defined(__i386__) || defined(__x86_64__) || defined(__s390__) \
+    || defined(EMSCRIPTEN)
 
 static inline void flush_idcache_range(uintptr_t rx, uintptr_t rw, size_t len)
 {
diff --git a/util/cacheflush.c b/util/cacheflush.c
index 1d12899a39..e5aa256cd8 100644
--- a/util/cacheflush.c
+++ b/util/cacheflush.c
@@ -225,7 +225,8 @@  static void __attribute__((constructor)) init_cache_info(void)
  * Architecture (+ OS) specific cache flushing mechanisms.
  */
 
-#if defined(__i386__) || defined(__x86_64__) || defined(__s390__)
+#if defined(__i386__) || defined(__x86_64__) || defined(__s390__) || \
+    defined(EMSCRIPTEN)
 
 /* Caches are coherent and do not require flushing; symbol inline. */