From patchwork Fri Dec 2 07:30:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: YunQiang Su X-Patchwork-Id: 9457977 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B120E60515 for ; Fri, 2 Dec 2016 07:30:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9E73A28505 for ; Fri, 2 Dec 2016 07:30:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8EC432852B; Fri, 2 Dec 2016 07:30:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0D70E28505 for ; Fri, 2 Dec 2016 07:30:47 +0000 (UTC) Received: from localhost ([::1]:32958 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cCiIv-0006Ua-5a for patchwork-qemu-devel@patchwork.kernel.org; Fri, 02 Dec 2016 02:30:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37281) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cCiIe-0006UP-O0 for qemu-devel@nongnu.org; Fri, 02 Dec 2016 02:30:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cCiId-0007sy-L0 for qemu-devel@nongnu.org; Fri, 02 Dec 2016 02:30:28 -0500 Received: from mail-wm0-x22b.google.com ([2a00:1450:400c:c09::22b]:35796) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cCiId-0007sC-E1 for qemu-devel@nongnu.org; Fri, 02 Dec 2016 02:30:27 -0500 Received: by mail-wm0-x22b.google.com with SMTP id a197so8317617wmd.0 for ; Thu, 01 Dec 2016 23:30:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:from:date:message-id:subject:to; bh=ftpJOdNhWoFRR6rWLVBBbXr7/OJT9hAJ2BBnBBeNgq4=; b=snCE4UMN7vwqKkxXq49h4GoHmpnauNvHHrlM941At7SMX0e1mx4IH96EXAUMz5A2rU xRGkCczoL/K/8yTV0oIAT81NNNn59d30U4XXsUsZ1BJX2eY2/aSyWuHqr6PnxB5WKw1Y lKriHi1ZPv2rpOPOQAVPFWno8O3MWMV4RjyI5AIQpiU7tDmfoAKRpM/2x1VC8HNE2mVS f9Z68esvIlIhY95tX/11AmxAOCjgvsIFWEdaHOTGic6HwmKVD0p5JGmIiJ243jHOozT7 Owqd/laPXstq6w5QM9su6bz5Dt9iKxCNGYoKFEWQ13H9WTYA6XDMvzLl0yGuTYMn50I8 N12w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=ftpJOdNhWoFRR6rWLVBBbXr7/OJT9hAJ2BBnBBeNgq4=; b=lveZjk1JvVOwOJjwToIA7Nk8yaW9jV1BVgTVeosYzYtHebF7ejjnMXxCgXVTnsS9B0 5l9F/AtADTDbXrYs8bxBmKNNWZgRe2KNvSqy2XOoYpq3lCfKiIpzMoChYyH1Xc7mAhm/ +5Hp4+WjX4NVHZSox3p7tRPJkgXES0FXi81KKHFvCAgC4ILi0oPpGnCEyoMxqn1QU1eX YVf3YxKzImGpLUP/j2a8/N0LgDw6vKI2Go4bCZDvp9p45mtZoC+l8wh6/TxYolDBgOHh r/y6zqR3YSYSNs9rLbHpAEkuBhrZmWfVCYqjyYtKE+JxiuW5uoTdYYsRf+q8GA8Aekky Cwvw== X-Gm-Message-State: AKaTC008FebZ3TilDP4f/XG4YE1kKKTnnPecfODU/j4oECaBB2Nara9YRD0T8KgLyxJO+aGPu+3oVkch+HjO7A== X-Received: by 10.28.13.9 with SMTP id 9mr1455283wmn.50.1480663826251; Thu, 01 Dec 2016 23:30:26 -0800 (PST) MIME-Version: 1.0 Received: by 10.80.152.164 with HTTP; Thu, 1 Dec 2016 23:30:25 -0800 (PST) From: YunQiang Su Date: Fri, 2 Dec 2016 15:30:25 +0800 Message-ID: To: jinguojie@loongson.cn, qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22b Subject: [Qemu-devel] [PATCH v5 00/10] tcg mips64 and mips r6 improvements X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP I tested this patch set on MIPS EB. 1) MIPS r2: (HOST) (qemu-system) (Debian ISO) 64eb -> i386 -> i386 64eb -> x86_64 -> i386 64eb -> x86_64 -> amd64 n32eb -> i386 -> i386 n32eb -> x86_64 -> i386 n32eb -> x86_64 -> amd64 32eb -> i386 -> i386 32eb -> x86_64 -> i386 32eb -> x86_64 -> amd64 2) On r2 CPU, with disable use_movnz_instructions use_mips32_instructions use_mips32r2_instructions See the attached file. (HOST) (qemu-system) (Debian ISO) 64eb -> i386 -> i386 64eb -> x86_64 -> i386 64eb -> x86_64 -> amd64 n32eb -> i386 -> i386 n32eb -> x86_64 -> i386 n32eb -> x86_64 -> amd64 32eb -> i386 -> i386 32eb -> x86_64 -> i386 32eb -> x86_64 -> amd64 If needed, I can also help to test other cases. diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index d352c97..d467dde 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -90,21 +90,24 @@ typedef enum { #if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \ defined(_MIPS_ARCH_LOONGSON2E) || defined(_MIPS_ARCH_LOONGSON2F) || \ defined(_MIPS_ARCH_MIPS4) -#define use_movnz_instructions 1 +//#define use_movnz_instructions 1 +extern bool use_movnz_instructions; #else extern bool use_movnz_instructions; #endif /* MIPS32 instruction set detection */ #if defined(__mips_isa_rev) && (__mips_isa_rev >= 1) -#define use_mips32_instructions 1 +//#define use_mips32_instructions 1 +extern bool use_mips32_instructions; #else extern bool use_mips32_instructions; #endif /* MIPS32R2 instruction set detection */ #if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) -#define use_mips32r2_instructions 1 +//#define use_mips32r2_instructions 1 +extern bool use_mips32r2_instructions; #else extern bool use_mips32r2_instructions; #endif diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index e6479e4..ab86b3b 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -2309,7 +2309,8 @@ static void tcg_target_detect_isa(void) "movz $zero, $zero, $zero\n" ".set pop\n" : : : ); - use_movnz_instructions = !got_sigill; + //use_movnz_instructions = !got_sigill; + use_movnz_instructions = 0; #endif /* Probe for MIPS32 instructions. As no subsetting is allowed @@ -2322,7 +2323,8 @@ static void tcg_target_detect_isa(void) "mul $zero, $zero\n" ".set pop\n" : : : ); - use_mips32_instructions = !got_sigill; + //use_mips32_instructions = !got_sigill; + use_mips32_instructions = 0; #endif /* Probe for MIPS32r2 instructions if MIPS32 instructions are @@ -2336,7 +2338,8 @@ static void tcg_target_detect_isa(void) "seb $zero, $zero\n" ".set pop\n" : : : ); - use_mips32r2_instructions = !got_sigill; + //use_mips32r2_instructions = !got_sigill; + use_mips32r2_instructions = 0; } #endif