From patchwork Fri Mar 2 04:34:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 10253369 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 549E36037D for ; Fri, 2 Mar 2018 04:36:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 43A94287C9 for ; Fri, 2 Mar 2018 04:36:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 382B8287E1; Fri, 2 Mar 2018 04:36:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0AC33287C9 for ; Fri, 2 Mar 2018 04:36:02 +0000 (UTC) Received: from localhost ([::1]:60767 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ercQL-0003IR-O6 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 01 Mar 2018 23:36:01 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53628) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ercPf-0002wS-Cn for qemu-devel@nongnu.org; Thu, 01 Mar 2018 23:35:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ercPe-0006bq-6c for qemu-devel@nongnu.org; Thu, 01 Mar 2018 23:35:19 -0500 Received: from mail-lf0-x242.google.com ([2a00:1450:4010:c07::242]:39569) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ercPd-0006Zp-Ux for qemu-devel@nongnu.org; Thu, 01 Mar 2018 23:35:18 -0500 Received: by mail-lf0-x242.google.com with SMTP id f75so11593209lfg.6 for ; Thu, 01 Mar 2018 20:35:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=mACrGYg5NNAfPFWS9euBpDwwRel4kU97z1HHRTVBNSs=; b=cLZeluC1e7BkbLsZzLA2gRNiDsh+IUQ5Cl+yz/ZU8LtsGt2NkRraM1pCAEqCncbtA3 pDkEAxCpYcO5tOHWFhgelmM7gHsaF6b3D2FKATsi1yzn8eYEGmK7lezmgL82bNtC1jJO jNV3fe54saXVMia35Fu7/AldOfIyDL1WnndCW6DMKZxoW6oYL8bafufxREFIDgM9MbtJ 42Wtcx6WYR1j5RFNJLpnLtoKNODeV/zDN+OxccExx72KPqGLSrFoXC4bajS9al2S1m/k CF4PK7sOEofgukH8VoYbcgmWF08YRxOoHb+C61tgtFKyByQnuW2AaE/cUhpp716FLVpR AzaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=mACrGYg5NNAfPFWS9euBpDwwRel4kU97z1HHRTVBNSs=; b=nm8Lhuh7s4qUW037cMmZ6WRGU3PCFx5HdixRcs+5DRgQN1/A4amMHDQo/snrELRfUx 9T9GDOabZ6yoVfQNZ8KXiRjhyQ241t3aNNpgl66MclarHAWFcPCTpeTQ8XzczlyAj4pW Lccn0sRSmg/qiZE/6lEoOkefRnMa6rXKmiK5llKVhfBZhDFbgBuQijplo6wxJdOA+B86 29X/ChkMpu5AEbtnSVnrhHORcTgULR5/rUdeHOXcGXvN/EnH3nwcGcNzFv9cgzst7gZl 60ULcljBV1THB6A7FH66l9jLztYwqGdxaULd3Wecr/NTtdeOhMEb10MLw1U8R5Phq7FP 25Zw== X-Gm-Message-State: AElRT7Hcqdiyfp7h9AiU8ovLNhtBlv38z89Q10buO3tV05jn9jGPZ4vQ 27T2sXzGDLt6fOqhCCkQAxb0yaYeV75dhckEifU= X-Google-Smtp-Source: AG47ELveaV/t2w4BmYZeIW0nXEJsiNszOFdEgDH5cun83AAtoQWhz7lGbS3LZ5FdeCaYaGETBLScaWjBxcX1mn6PIqY= X-Received: by 10.25.170.144 with SMTP id t138mr2912165lfe.71.1519965316312; Thu, 01 Mar 2018 20:35:16 -0800 (PST) MIME-Version: 1.0 Received: by 10.46.83.1 with HTTP; Thu, 1 Mar 2018 20:34:45 -0800 (PST) In-Reply-To: References: From: Alistair Francis Date: Thu, 1 Mar 2018 20:34:45 -0800 Message-ID: To: Alistair Francis X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::242 Subject: Re: [Qemu-devel] [PATCH v1 1/1] target/arm: Fix the A53 L2CTLR typo X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "qemu-devel@nongnu.org Developers" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Mar 1, 2018 at 4:20 PM, Alistair Francis wrote: > The cortex A53 TRM specifices that bits 24 and 25 of the L2CTLR register > specify the number of cores present and not the number of processors. We > have correctly been reporting the number of cores, so just fix the > comment to match the TRM. > > Signed-off-by: Alistair Francis Ah! This isn't actually what I want, I want something more like this (untested): commit ce9d9795ebff42e1f742e7dc3786e52524807c65 Author: Alistair Francis Date: Thu Mar 1 20:19:23 2018 -0800 target/arm: Report the number of cores in the cluster Previously we assumed that we only has a single cluster, which meant we could get away with reporting smp_cpus to the guest. There are cases where we have two clusters (Xilinx's ZynqMP is a good example) so reporting the number of smp_cpus is incorrect. Instead count the cores in the cluster. Signed-off-by: Alistair Francis I'll send a patch tomorrow after testing. Alistair > --- > > target/arm/cpu64.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c > index 9743bdc8c3..aac1746efe 100644 > --- a/target/arm/cpu64.c > +++ b/target/arm/cpu64.c > @@ -42,7 +42,7 @@ static inline void unset_feature(CPUARMState *env, int feature) > #ifndef CONFIG_USER_ONLY > static uint64_t a57_a53_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) > { > - /* Number of processors is in [25:24]; otherwise we RAZ */ > + /* Number of cores is in [25:24]; otherwise we RAZ */ > return (smp_cpus - 1) << 24; > } > #endif > -- > 2.14.1 > diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 9743bdc..e7b1f3c 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -42,8 +42,24 @@ static inline void unset_feature(CPUARMState *env, int feature) #ifndef CONFIG_USER_ONLY static uint64_t a57_a53_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri) { - /* Number of processors is in [25:24]; otherwise we RAZ */ - return (smp_cpus - 1) << 24; + CPUState *cpu; + CPUState *cpu_prev = NULL; + int num_cores = 0; + + /* Figure out the number of cores in the cluster */ + for (cpu = first_cpu; cpu; cpu = CPU_NEXT(cpu)) { + /* Only increase the core count if the CPU we are on is the same + * class as the caller and the previous cpu. + */ + if ((CPU_GET_CLASS(cpu) == CPU_GET_CLASS(cpu_prev)) && + (CPU_GET_CLASS(cpu) == CPU_GET_CLASS(CPU(env)))) { + num_cores++; + } + cpu_prev = cpu; + } + + /* Number of cores is in [25:24]; otherwise we RAZ */ + return num_cores << 24; } #endif