diff mbox series

[5/8] Add micromips to P5600

Message ID PA4PR09MB4864F7B726C9BA323BB307A1846B2@PA4PR09MB4864.eurprd09.prod.outlook.com (mailing list archive)
State New, archived
Headers show
Series [1/8] Add CP0 MemoryMapID register implementation | expand

Commit Message

Aleksandar Rakic Sept. 27, 2024, 12:08 p.m. UTC 
Add micromips to P5600.

Cherry-picked d7bf2c2f7f2e03b55c6e9c57eec5c3e6207005a0
from https://github.com/MIPS/gnutools-qemu

Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Matthew Fortune <matthew.fortune@imgtec.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
---
 target/mips/cpu-defs.c.inc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc
index fbf787d8ce..9428ece220 100644
--- a/target/mips/cpu-defs.c.inc
+++ b/target/mips/cpu-defs.c.inc
@@ -462,7 +462,7 @@  const mips_def_t mips_defs[] =
         .CP1_fcr31_rw_bitmask = 0xFF83FFFF,
         .SEGBITS = 32,
         .PABITS = 40,
-        .insn_flags = CPU_MIPS32R5,
+        .insn_flags = CPU_MIPS32R5 | ASE_MICROMIPS,
         .mmu_type = MMU_TYPE_R4000,
     },
     {