| Message ID | a190459619957cfc6ea1c3972ac7b99defebc506.1715209155.git.balaton@eik.bme.hu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Misc PPC exception and BookE MMU clean ups | expand |
On Thu May 9, 2024 at 9:36 AM AEST, BALATON Zoltan wrote: > Merge the code fetch and data access cases in a common switch. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> > --- > target/ppc/mmu_common.c | 52 ++++++++++++++++------------------------- > 1 file changed, 20 insertions(+), 32 deletions(-) > > diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c > index bb49721004..1d56dca8ba 100644 > --- a/target/ppc/mmu_common.c > +++ b/target/ppc/mmu_common.c > @@ -1195,45 +1195,33 @@ static bool ppc_booke_xlate(PowerPCCPU *cpu, vaddr eaddr, > > log_cpu_state_mask(CPU_LOG_MMU, cs, 0); > env->error_code = 0; > - if (ret == -1) { > + switch (ret) { > + case -1: > + /* No matches in page tables or TLB */ > if (env->mmu_model == POWERPC_MMU_BOOKE206) { > booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_idx); > } > - } > - if (access_type == MMU_INST_FETCH) { > - switch (ret) { > - case -1: > - /* No matches in page tables or TLB */ > - cs->exception_index = POWERPC_EXCP_ITLB; > - env->spr[SPR_BOOKE_DEAR] = eaddr; > - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); > - break; > - case -2: > - /* Access rights violation */ > - cs->exception_index = POWERPC_EXCP_ISI; > - break; > - case -3: > - /* No execute protection violation */ > - cs->exception_index = POWERPC_EXCP_ISI; > - env->spr[SPR_BOOKE_ESR] = 0; > - break; > - } > - } else { > - switch (ret) { > - case -1: > - /* No matches in page tables or TLB */ > - cs->exception_index = POWERPC_EXCP_DTLB; > - env->spr[SPR_BOOKE_DEAR] = eaddr; > - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); > - break; > - case -2: > - /* Access rights violation */ > - cs->exception_index = POWERPC_EXCP_DSI; > + cs->exception_index = (access_type == MMU_INST_FETCH) ? > + POWERPC_EXCP_ITLB : POWERPC_EXCP_DTLB; > + env->spr[SPR_BOOKE_DEAR] = eaddr; > + env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); > + break; > + case -2: > + /* Access rights violation */ > + cs->exception_index = (access_type == MMU_INST_FETCH) ? > + POWERPC_EXCP_ISI : POWERPC_EXCP_DSI; > + if (access_type != MMU_INST_FETCH) { > env->spr[SPR_BOOKE_DEAR] = eaddr; > env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); > - break; > } > + break; > + case -3: > + /* No execute protection violation */ > + cs->exception_index = POWERPC_EXCP_ISI; > + env->spr[SPR_BOOKE_ESR] = 0; > + break; > } > + > return false; > } >
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index bb49721004..1d56dca8ba 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -1195,45 +1195,33 @@ static bool ppc_booke_xlate(PowerPCCPU *cpu, vaddr eaddr, log_cpu_state_mask(CPU_LOG_MMU, cs, 0); env->error_code = 0; - if (ret == -1) { + switch (ret) { + case -1: + /* No matches in page tables or TLB */ if (env->mmu_model == POWERPC_MMU_BOOKE206) { booke206_update_mas_tlb_miss(env, eaddr, access_type, mmu_idx); } - } - if (access_type == MMU_INST_FETCH) { - switch (ret) { - case -1: - /* No matches in page tables or TLB */ - cs->exception_index = POWERPC_EXCP_ITLB; - env->spr[SPR_BOOKE_DEAR] = eaddr; - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); - break; - case -2: - /* Access rights violation */ - cs->exception_index = POWERPC_EXCP_ISI; - break; - case -3: - /* No execute protection violation */ - cs->exception_index = POWERPC_EXCP_ISI; - env->spr[SPR_BOOKE_ESR] = 0; - break; - } - } else { - switch (ret) { - case -1: - /* No matches in page tables or TLB */ - cs->exception_index = POWERPC_EXCP_DTLB; - env->spr[SPR_BOOKE_DEAR] = eaddr; - env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); - break; - case -2: - /* Access rights violation */ - cs->exception_index = POWERPC_EXCP_DSI; + cs->exception_index = (access_type == MMU_INST_FETCH) ? + POWERPC_EXCP_ITLB : POWERPC_EXCP_DTLB; + env->spr[SPR_BOOKE_DEAR] = eaddr; + env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); + break; + case -2: + /* Access rights violation */ + cs->exception_index = (access_type == MMU_INST_FETCH) ? + POWERPC_EXCP_ISI : POWERPC_EXCP_DSI; + if (access_type != MMU_INST_FETCH) { env->spr[SPR_BOOKE_DEAR] = eaddr; env->spr[SPR_BOOKE_ESR] = mmubooke206_esr(mmu_idx, access_type); - break; } + break; + case -3: + /* No execute protection violation */ + cs->exception_index = POWERPC_EXCP_ISI; + env->spr[SPR_BOOKE_ESR] = 0; + break; } + return false; }
Merge the code fetch and data access cases in a common switch. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- target/ppc/mmu_common.c | 52 ++++++++++++++++------------------------- 1 file changed, 20 insertions(+), 32 deletions(-)