From patchwork Wed Mar 2 06:56:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Crosthwaite X-Patchwork-Id: 8478231 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C1AA2C0553 for ; Wed, 2 Mar 2016 06:58:57 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 06FBE20382 for ; Wed, 2 Mar 2016 06:58:57 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 48FCD2037C for ; Wed, 2 Mar 2016 06:58:56 +0000 (UTC) Received: from localhost ([::1]:54440 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab0kJ-000143-Kd for patchwork-qemu-devel@patchwork.kernel.org; Wed, 02 Mar 2016 01:58:55 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56007) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab0iO-00063e-8a for qemu-devel@nongnu.org; Wed, 02 Mar 2016 01:56:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ab0iN-0003RS-A0 for qemu-devel@nongnu.org; Wed, 02 Mar 2016 01:56:56 -0500 Received: from mail-pa0-x230.google.com ([2607:f8b0:400e:c03::230]:35766) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab0iM-0003RM-Vt; Wed, 02 Mar 2016 01:56:55 -0500 Received: by mail-pa0-x230.google.com with SMTP id bj10so58528058pad.2; Tue, 01 Mar 2016 22:56:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=bCO8dTI8bEivl7hz+ME3DpN2V0T0vMzqMoXxkznGneA=; b=kNGUKng8VjepMdCOuLkO4kTJOnrHSdoOwX0X9kIrSH0lFEoPfjuyFnIxERYJhRvoWz XwVeD5sC5U/Q9BrmOYfQ3egHZZ1TMNP50cKTmf6dG4gKylt6KlJcuTjj+brWy3OmYyyI wycVsAXj0exKgg+GYK+HpxvWXM5MfdzELA/h1GTf/YV3XOlSHnGobUqjRPPWoYhOEUoN VJDD16UpKWSTtpDFme8uUFfF8Co2EJBl4qz1AJyw60kkNl2qDP7gWpLyvB5MZf1zH6st UPEESIc/OCmmIy1ZJJki61C56RKhxoddD3mMV2B/NObVE3/3Phgi8Ib2EYuMEnZ6R7Sn 515A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=bCO8dTI8bEivl7hz+ME3DpN2V0T0vMzqMoXxkznGneA=; b=J+PBgVXBFm5tFSDpfrsYGRqq0bFtqCTP8uEFO0OnlQTt0MwWYFgfkVhduihLDS9utO ZsvliOrT7QklseJZkhfCZiqEP7NnbyV/509n4aQyN3VoshJ93VlyKM3V7IfGwzQMyGcZ MkiL6RzPghS0MFMNGYrytLXR25s5QpIspxEa0fLueQZsneXtxjMvVhlnDNRNptoQHdpR zPUzYvJatm2Un3x/01f26tS82uPacRYetyE7p6DLOWEKfMIaU1HhKs/rPqHyMHMafcFs WlqCweQ2yd+AEPuI3fCewbxsge5gfWrHg6gbH9saGavTDnklfliiUXuWL1AfFchUIaCi zMLA== X-Gm-Message-State: AD7BkJLdHTf1/chvA+xZVQBJ/eZKIuwJPrXi7sRF0w7XTGsPIvwQ1Ulv1ZwphRpik32u6Q== X-Received: by 10.67.30.163 with SMTP id kf3mr36398963pad.45.1456901814205; Tue, 01 Mar 2016 22:56:54 -0800 (PST) Received: from localhost.localdomain (mobile-166-137-179-103.mycingular.net. [166.137.179.103]) by smtp.gmail.com with ESMTPSA id 19sm50069248pfb.64.2016.03.01.22.56.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 01 Mar 2016 22:56:53 -0800 (PST) From: Peter Crosthwaite X-Google-Original-From: Peter Crosthwaite To: qemu-devel@nongnu.org Date: Tue, 1 Mar 2016 22:56:08 -0800 Message-Id: X-Mailer: git-send-email 1.9.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:400e:c03::230 Cc: peter.maydell@linaro.org, Peter Crosthwaite , sw@weilnetz.de, Andrew.Baumann@microsoft.com, alistair.francis@xilinx.com, sridhar_kulk@yahoo.com, qemu-arm@nongnu.org, pbonzini@redhat.com, piotr.krol@3mdeb.com Subject: [Qemu-devel] [PATCH v2 04/18] target-arm: cpu: Move cpu_is_big_endian to header X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Crosthwaite There is a CPU data endianness test that is used to drive the virtio_big_endian test. Move this up to the header so it can be more generally used for endian tests. The KVM specific cpu_syncronize_state call is left behind in the virtio specific function. Rename it arm_cpu-data_is_big_endian() to more accurately capture that this is for data accesses only. Reviewed-by: Alistair Francis Signed-off-by: Peter Crosthwaite --- TEST result: 0 (log@ logs/qemu-armeb-BE32-) TEST result: 0 (log@ logs/qemu-armeb-BE8-) TEST result: 0 (log@ logs/qemu-arm-LE-) TEST result: 0 (log@ logs/qemu-system-arm-LE-) Changed since v1: rename to arm_cpu_data_is_big_endian (PMM review) inline function to suppress compile warning. target-arm/cpu.c | 19 +++---------------- target-arm/cpu.h | 19 +++++++++++++++++++ 2 files changed, 22 insertions(+), 16 deletions(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 001fccf..352d9f8 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -369,26 +369,13 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level) #endif } -static bool arm_cpu_is_big_endian(CPUState *cs) +static bool arm_cpu_virtio_is_big_endian(CPUState *cs) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; - int cur_el; cpu_synchronize_state(cs); - - /* In 32bit guest endianness is determined by looking at CPSR's E bit */ - if (!is_a64(env)) { - return (env->uncached_cpsr & CPSR_E) ? 1 : 0; - } - - cur_el = arm_current_el(env); - - if (cur_el == 0) { - return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0; - } - - return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0; + return arm_cpu_data_is_big_endian(env); } #endif @@ -1476,7 +1463,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_attrs_debug = arm_cpu_get_phys_page_attrs_debug; cc->asidx_from_attrs = arm_asidx_from_attrs; cc->vmsd = &vmstate_arm_cpu; - cc->virtio_is_big_endian = arm_cpu_is_big_endian; + cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian; cc->write_elf64_note = arm_cpu_write_elf64_note; cc->write_elf32_note = arm_cpu_write_elf32_note; #endif diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 61b8b03..75e5ea0 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1908,6 +1908,25 @@ static inline bool arm_sctlr_b(CPUARMState *env) (env->cp15.sctlr_el[1] & SCTLR_B) != 0; } +/* Return true if the processor is in big-endian mode. */ +static inline bool arm_cpu_data_is_big_endian(CPUARMState *env) +{ + int cur_el; + + /* In 32bit endianness is determined by looking at CPSR's E bit */ + if (!is_a64(env)) { + return (env->uncached_cpsr & CPSR_E) ? 1 : 0; + } + + cur_el = arm_current_el(env); + + if (cur_el == 0) { + return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0; + } + + return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0; +} + #include "exec/cpu-all.h" /* Bit usage in the TB flags field: bit 31 indicates whether we are