From patchwork Fri Oct 5 07:43:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic BARRE X-Patchwork-Id: 10627437 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DE16415E8 for ; Fri, 5 Oct 2018 07:44:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B32D4292C9 for ; Fri, 5 Oct 2018 07:44:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A7848292CB; Fri, 5 Oct 2018 07:44:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F3531292CA for ; Fri, 5 Oct 2018 07:44:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728386AbeJEOl5 (ORCPT ); Fri, 5 Oct 2018 10:41:57 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:20542 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728200AbeJEOl5 (ORCPT ); Fri, 5 Oct 2018 10:41:57 -0400 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w957dtCd013018; Fri, 5 Oct 2018 09:44:04 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2msxh71ngq-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 05 Oct 2018 09:44:04 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6287B38; Fri, 5 Oct 2018 07:44:03 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2D334237A; Fri, 5 Oct 2018 07:44:03 +0000 (GMT) Received: from SAFEX1HUBCAS22.st.com (10.75.90.93) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 5 Oct 2018 09:44:03 +0200 Received: from lmecxl0923.lme.st.com (10.48.0.237) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Fri, 5 Oct 2018 09:44:02 +0200 From: Ludovic Barre To: Mark Brown , Marek Vasut , Boris Brezillon , Rob Herring CC: Maxime Coquelin , Alexandre Torgue , , , , , , Ludovic Barre Subject: [PATCH 0/2] spi: spi-mem: add stm32 qspi controller Date: Fri, 5 Oct 2018 09:43:01 +0200 Message-ID: <1538725383-19781-1-git-send-email-ludovic.Barre@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.48.0.237] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-10-05_03:,, signatures=0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ludovic Barre The goal of this serie is to add support of qspi controller for stm32. It is a specialized communication interface targeting single, dual or quad SPI Flash memories (NOR/NAND). Ludovic Barre (2): dt-bindings: spi: add stm32 qspi controller spi: spi-mem: add stm32 qspi controller .../devicetree/bindings/spi/spi-stm32-qspi.txt | 44 ++ drivers/spi/Kconfig | 9 + drivers/spi/Makefile | 1 + drivers/spi/spi-stm32-qspi.c | 512 +++++++++++++++++++++ 4 files changed, 566 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-stm32-qspi.txt create mode 100644 drivers/spi/spi-stm32-qspi.c