From patchwork Wed Jan 8 12:55:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11323499 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C11F6109A for ; Wed, 8 Jan 2020 12:56:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A8E692051A for ; Wed, 8 Jan 2020 12:56:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727602AbgAHM4G (ORCPT ); Wed, 8 Jan 2020 07:56:06 -0500 Received: from esa4.microchip.iphmx.com ([68.232.154.123]:31331 "EHLO esa4.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726254AbgAHM4F (ORCPT ); Wed, 8 Jan 2020 07:56:05 -0500 Received-SPF: Pass (esa4.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa4.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa4.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa4.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa4.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: feLro1JNCFp1+UpYxfUe+bG2IPLSvnlmgEXzWgR/sW3uX4OwPBSjnIj8qhK2OnwOjjDOqzVpbt g8bZUzYBbwpp+khpk6/ata/+DQPt9aBwtnPADf6kO2iqyJour8APSLqAWRCsC61k0Iv5val3AB +w32RZ3p2/hGM7Abr6FCBcun5Lp4TmpY9srfoUiBepWiL5KArSMVzb6N8wh8mTDnlI4CxH7Kr6 OQwyP26353aBoemlTeFG5Bpj+fE3wiMJjSz0Au3d7cS/SPDHITUHuvh3QHOPTtmyV4EvzqeVnH K3Q= X-IronPort-AV: E=Sophos;i="5.69,410,1571727600"; d="scan'208";a="60517506" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Jan 2020 05:56:03 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 8 Jan 2020 05:56:02 -0700 Received: from m18063-ThinkPad-T460p.microchip.com (10.10.85.251) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Wed, 8 Jan 2020 05:55:55 -0700 From: Claudiu Beznea To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , Claudiu Beznea Subject: [PATCH 00/16] add device tree for SAM9X60 SoC and SAM9X60-EK board Date: Wed, 8 Jan 2020 14:55:07 +0200 Message-ID: <1578488123-26127-1-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This series add device tree for SAM9X60 SoC and SAM9X60-EK board. Allong with these, there are patches that documents some compatibles for SAM9X60's IPs. Claudiu Beznea (15): dt-bindings: at_xdmac: add entry for microchip compatibles dt-bindings: atmel-can: add microchip,sam9x60-can dt-bindings: atmel-tcb: add microchip,-tcb dt-bindings: atmel-isi: add microchip,sam9x60-isi dt-bindings: at91-sama5d2_adc: add microchip,sam9x60-adc dt-bindings: atmel-matrix: add microchip,sam9x60-matrix dt-bindings: atmel-nand: add microchip,sam9x60-pmecc dt-bindings: atmel-sysreg: add microchip,sam9x60-ddramc dt-bindings: atmel-smc: add microchip,sam9x60-smc dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr dt-bindings: atmel,at91rm9200-rtc: add microchip,sam9x60-rtc dt-bindings: spi_atmel: add microchip,sam9x60-spi dt-bindings: atmel-usart: add microchip,-usart dt-bindings: arm: add sam9x60-ek board ARM: at91/defconfig: enable MMC_SDHCI_OF_AT91 and MICROCHIP_PIT64B Sandeep Sheriker Mallikarjun (1): ARM: dts: at91: sam9x60: add device tree for soc and board .../devicetree/bindings/arm/atmel-at91.yaml | 6 + .../devicetree/bindings/arm/atmel-sysregs.txt | 1 + .../devicetree/bindings/dma/atmel-xdma.txt | 3 +- .../bindings/iio/adc/at91-sama5d2_adc.txt | 2 +- .../devicetree/bindings/media/atmel-isi.txt | 2 +- .../devicetree/bindings/mfd/atmel-gpbr.txt | 4 +- .../devicetree/bindings/mfd/atmel-matrix.txt | 1 + .../devicetree/bindings/mfd/atmel-smc.txt | 1 + .../devicetree/bindings/mfd/atmel-tcb.txt | 5 +- .../devicetree/bindings/mfd/atmel-usart.txt | 6 +- .../devicetree/bindings/mtd/atmel-nand.txt | 1 + .../devicetree/bindings/net/can/atmel-can.txt | 3 +- .../bindings/rtc/atmel,at91rm9200-rtc.txt | 3 +- .../devicetree/bindings/spi/spi_atmel.txt | 2 +- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/at91-sam9x60ek.dts | 647 +++++++++++++++++++ arch/arm/boot/dts/sam9x60.dtsi | 691 +++++++++++++++++++++ arch/arm/configs/at91_dt_defconfig | 4 + 18 files changed, 1373 insertions(+), 11 deletions(-) create mode 100644 arch/arm/boot/dts/at91-sam9x60ek.dts create mode 100644 arch/arm/boot/dts/sam9x60.dtsi