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[v2,00/10] spi: atmel-quadspi: introduce sam9x60 qspi controller

Message ID 20190131161515.21605-1-tudor.ambarus@microchip.com (mailing list archive)
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Series spi: atmel-quadspi: introduce sam9x60 qspi controller | expand

Message

Tudor Ambarus Jan. 31, 2019, 4:15 p.m. UTC 
From: Tudor Ambarus <tudor.ambarus@microchip.com>

Patches from 1 to 8 are minor fixes or cosmetics.
Patches 9 and 10 introduce the sam9x60 qspi controller.

sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash.
Backward compatibility test done on sama5d2 qspi controller and
mx25l25635e jedec,spi-nor flash.

The patches are generated on top of for-next branch.

v2:
- cache MR value,
- drop iomem wrappers,
- make "pclk" clock-name mandatory even for sama5d2,
- rework clock handling,
- reorder setting of register values in set_cfg() calls,
- collect R-b tags.

Tudor Ambarus (10):
  spi: atmel-quadspi: cache MR value to avoid a write access
  spi: atmel-quadspi: order header files inclusion alphabetically
  spi: atmel-quadspi: drop wrappers for iomem accesses
  spi: atmel-quadspi: fix naming scheme
  spi: atmel-quadspi: remove unnecessary cast
  spi: atmel-quadspi: return appropriate error code
  spi: atmel-quadspi: switch to SPDX license identifiers
  dt-bindings: spi: atmel-quadspi: update example to new clock binding
  dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60
  spi: atmel-quadspi: add support for sam9x60 qspi controller

 .../devicetree/bindings/spi/atmel-quadspi.txt      |  14 +-
 drivers/spi/atmel-quadspi.c                        | 374 +++++++++++++++------
 2 files changed, 281 insertions(+), 107 deletions(-)