Message ID | 20201119055551.26493-1-vadivel.muruganx.ramuthevar@linux.intel.com (mailing list archive) |
---|---|
Headers | show |
Series | spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC | expand |
On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote: > Add QSPI controller support for Intel LGM SoC. > > Note from Vignesh(mtd subsystem maintainer): > This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add > support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX > <vadivel.muruganx.ramuthevar@linux.intel.com> that intended to move > cadence-quadspi driver to spi-mem framework > > Those patches were trying to accomplish too many things in a single set > of patches and need to split into smaller patches. This is reduced > version of above series. > > Changes that are intended to make migration easy are split into separate > patches. Patches 1 to 3 drop features that cannot be supported under > spi-mem at the moment (backward compatibility is maintained). > Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to > spi-mem and patch 7 moves the driver to drivers/spi folder. > > I have tested both INDAC mode (used by non TI platforms like Altera > SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs. > > Patches to move move bindings over to > "Documentation/devicetree/bindings/spi/" directory and also conversion > of bindig doc to YAML will be posted separately. Support for Intel > platform would follow that. > > Reference: > https://lkml.org/lkml/2020/6/1/50 > > --- > v8: > - As Mark suggested to add the dt-bindings documentation patches > end of the series , so dropped. Suggestion was to drop patches converting legacy binding doc to YAML schema. You still need to include a patch documenting new compatible "intel,lgm-qspi" in the existing (legacy) binding doc.
On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote: > Add QSPI controller support for Intel LGM SoC. > > Note from Vignesh(mtd subsystem maintainer): > This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add > support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX > <vadivel.muruganx.ramuthevar@linux.intel.com> that intended to move > cadence-quadspi driver to spi-mem framework > > Those patches were trying to accomplish too many things in a single set > of patches and need to split into smaller patches. This is reduced > version of above series. > > Changes that are intended to make migration easy are split into separate > patches. Patches 1 to 3 drop features that cannot be supported under > spi-mem at the moment (backward compatibility is maintained). > Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to > spi-mem and patch 7 moves the driver to drivers/spi folder. > This text no longer makes sense anymore with few patches dropped and others reordered > I have tested both INDAC mode (used by non TI platforms like Altera > SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs. > > Patches to move move bindings over to > "Documentation/devicetree/bindings/spi/" directory and also conversion > of bindig doc to YAML will be posted separately. Support for Intel > platform would follow that. > > Reference: > https://lkml.org/lkml/2020/6/1/50 > > --- > v8: > - As Mark suggested to add the dt-bindings documentation patches > end of the series , so dropped. > > Ramuthevar Vadivel Murugan (6): > spi: cadence-quadspi: Add QSPI support for Intel LGM SoC > spi: cadence-quadspi: Disable the DAC for Intel LGM SoC > spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC > spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi > dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml > dt-bindings: spi: Add compatible for Intel LGM SoC > This is quite confusing... Summary/diffstat still shows patches 4 to 6 and so does the patch numbering in $subject while changelog says otherwise and I received only 3 patches in my Inbox? > .../devicetree/bindings/mtd/cadence-quadspi.txt | 67 ---------- > .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 148 +++++++++++++++++++++ > drivers/spi/Kconfig | 2 +- > drivers/spi/spi-cadence-quadspi.c | 33 ++++- > 4 files changed, 178 insertions(+), 72 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt > create mode 100644 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml > So does the diffstat...
Hi Vignesh, Thank you very much for the review comments... On 19/11/2020 8:36 pm, Vignesh Raghavendra wrote: > > > On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote: >> Add QSPI controller support for Intel LGM SoC. >> >> Note from Vignesh(mtd subsystem maintainer):H >> This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add >> support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX >> <vadivel.muruganx.ramuthevar@linux.intel.com> that intended to move >> cadence-quadspi driver to spi-mem framework >> >> Those patches were trying to accomplish too many things in a single set >> of patches and need to split into smaller patches. This is reduced >> version of above series. >> >> Changes that are intended to make migration easy are split into separate >> patches. Patches 1 to 3 drop features that cannot be supported under >> spi-mem at the moment (backward compatibility is maintained). >> Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to >> spi-mem and patch 7 moves the driver to drivers/spi folder. >> >> I have tested both INDAC mode (used by non TI platforms like Altera >> SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs. >> >> Patches to move move bindings over to >> "Documentation/devicetree/bindings/spi/" directory and also conversion >> of bindig doc to YAML will be posted separately. Support for Intel >> platform would follow that. >> >> Reference: >> https://lkml.org/lkml/2020/6/1/50 >> >> --- >> v8: >> - As Mark suggested to add the dt-bindings documentation patches >> end of the series , so dropped. > > Suggestion was to drop patches converting legacy binding doc to YAML schema. > You still need to include a patch documenting new compatible > "intel,lgm-qspi" in the existing (legacy) binding doc. Noted, will do that. Regards Vadivel >
Hi Vignesh, Thank you for the review comments... On 19/11/2020 9:06 pm, Vignesh Raghavendra wrote: > > > On 11/19/20 11:25 AM, Ramuthevar,Vadivel MuruganX wrote: >> Add QSPI controller support for Intel LGM SoC. >> >> Note from Vignesh(mtd subsystem maintainer): >> This series is a subset of "[PATCH v12 0/4] spi: cadence-quadspi: Add >> support for the Cadence QSPI controller" by Ramuthevar,Vadivel MuruganX >> <vadivel.muruganx.ramuthevar@linux.intel.com> that intended to move >> cadence-quadspi driver to spi-mem framework >> >> Those patches were trying to accomplish too many things in a single set >> of patches and need to split into smaller patches. This is reduced >> version of above series. >> >> Changes that are intended to make migration easy are split into separate >> patches. Patches 1 to 3 drop features that cannot be supported under >> spi-mem at the moment (backward compatibility is maintained). >> Patch 4-5 are trivial cleanups. Patch 6 does the actual conversion to >> spi-mem and patch 7 moves the driver to drivers/spi folder. >> > > This text no longer makes sense anymore with few patches dropped and > others reordered Just for reference added, will drop it. > >> I have tested both INDAC mode (used by non TI platforms like Altera >> SoCFPGA) and DAC mode (used by TI platforms) on TI EVMs. >> >> Patches to move move bindings over to >> "Documentation/devicetree/bindings/spi/" directory and also conversion >> of bindig doc to YAML will be posted separately. Support for Intel >> platform would follow that. >> >> Reference: >> https://lkml.org/lkml/2020/6/1/50 >> >> --- >> v8: >> - As Mark suggested to add the dt-bindings documentation patches >> end of the series , so dropped. > > >> >> Ramuthevar Vadivel Murugan (6): >> spi: cadence-quadspi: Add QSPI support for Intel LGM SoC >> spi: cadence-quadspi: Disable the DAC for Intel LGM SoC >> spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC >> spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi >> dt-bindings: spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml >> dt-bindings: spi: Add compatible for Intel LGM SoC >> > > This is quite confusing... Summary/diffstat still shows patches 4 to 6 > and so does the patch numbering in $subject while changelog says > otherwise and I received only 3 patches in my Inbox? oh my bad, while patch creation wrongly added, will correct it, thanks! Regards Vadivel > > >> .../devicetree/bindings/mtd/cadence-quadspi.txt | 67 ---------- >> .../devicetree/bindings/spi/cdns,qspi-nor.yaml | 148 +++++++++++++++++++++ >> drivers/spi/Kconfig | 2 +- >> drivers/spi/spi-cadence-quadspi.c | 33 ++++- >> 4 files changed, 178 insertions(+), 72 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-quadspi.txt >> create mode 100644 Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml >> > > So does the diffstat... >