Message ID | 20220427105407.40167-1-abbotti@mev.co.uk (mailing list archive) |
---|---|
Headers | show |
Series | ARM: socfpga: fix broken QuadSPI support | expand |
On Wed, Apr 27, 2022 at 11:54:05AM +0100, Ian Abbott wrote: > Write support on the Cadence QSPI controller on the Intel SoCFPGA > platform was broken by 9cb2ff111712 ("spi: cadence-quadspi: Disable > Auto-HW polling) and fixed by 98d948eb8331 ("spi: cadence-quadspi: fix > write completion support") and 36de991e9390 ("ARM: dts: socfpga: change > qspi to "intel,socfpga-qspi"). > > 1) spi: cadence-quadspi: fix write completion support > 2) ARM: dts: socfpga: change qspi to "intel,socfpga-qspi" > > arch/arm/boot/dts/socfpga.dtsi | 2 +- > arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- > arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 2 +- > arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 +- > drivers/spi/spi-cadence-quadspi.c | 24 ++++++++++++++++++++--- > 5 files changed, 25 insertions(+), 7 deletions(-) > Both now queued up, thanks. greg k-h