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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2022 08:08:49.0946 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c46ac1c9-857c-424d-29d5-08da34b7cf95 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT047.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4571 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add multiple chip select lines supported on Tegra 241 Changes in v2: Split Wait polling changes to be handled later Change chip name to convention followed (Grace to 241) Add tegra qspi peripherals yaml file Krishna Yarlagadda (3): spi: tegra210-quad: Multi-cs support spi: dt-bindings: split peripheral prods spi: dt-bindings: Add compatible for Tegra241 QSPI ...nvidia,tegra210-quad-peripheral-props.yaml | 45 +++++++++++++++++++ .../bindings/spi/nvidia,tegra210-quad.yaml | 33 +------------- .../bindings/spi/spi-peripheral-props.yaml | 1 + drivers/spi/spi-tegra210-quad.c | 33 +++++++++++++- 4 files changed, 78 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml