From patchwork Fri Sep 10 16:19:37 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wellsk40@gmail.com X-Patchwork-Id: 170552 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8ANJaCG025795 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 10 Sep 2010 23:19:57 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-2.v29.ch3.sourceforge.com) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1OuCsa-0001Rd-QW; Fri, 10 Sep 2010 23:19:36 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1OuCsZ-0001RW-60 for spi-devel-general@lists.sourceforge.net; Fri, 10 Sep 2010 23:19:35 +0000 Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of gmail.com designates 209.85.216.47 as permitted sender) client-ip=209.85.216.47; envelope-from=wellsk40@gmail.com; helo=mail-qw0-f47.google.com; Received: from mail-qw0-f47.google.com ([209.85.216.47]) by sog-mx-4.v43.ch3.sourceforge.com with esmtp (Exim 4.69) id 1OuCsU-0000gc-UO for spi-devel-general@lists.sourceforge.net; Fri, 10 Sep 2010 23:19:35 +0000 Received: by qwa26 with SMTP id 26so1777707qwa.34 for ; Fri, 10 Sep 2010 16:19:25 -0700 (PDT) Received: by 10.229.181.198 with SMTP id bz6mr1243885qcb.114.1284160765524; Fri, 10 Sep 2010 16:19:25 -0700 (PDT) Received: from localhost6.localdomain6 (66-193-100-242.static.twtelecom.net [66.193.100.242]) by mx.google.com with ESMTPS id r38sm3294922qcs.14.2010.09.10.16.19.22 (version=SSLv3 cipher=RC4-MD5); Fri, 10 Sep 2010 16:19:24 -0700 (PDT) From: wellsk40@gmail.com To: linus.walleij@stericsson.com, spi-devel-general@lists.sourceforge.net Subject: [PATCH 3/5] ARM: U300: spi->mode and spi_bits_per_words updates Date: Fri, 10 Sep 2010 09:19:37 -0700 Message-Id: <1284135579-13578-4-git-send-email-wellsk40@gmail.com> X-Mailer: git-send-email 1.7.2.2 In-Reply-To: <1284135579-13578-1-git-send-email-wellsk40@gmail.com> References: <1284135579-13578-1-git-send-email-wellsk40@gmail.com> X-Spam-Score: 1.7 (+) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.216.47 listed in list.dnswl.org] -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain 0.0 FREEMAIL_FROM Sender email is freemail (wellsk40[at]gmail.com) 1.1 DATE_IN_PAST_06_12 Date: is 6 to 12 hours before Received: date -0.0 SPF_PASS SPF: sender matches SPF record 2.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (wellsk40[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 T_TO_NO_BRKTS_FREEMAIL T_TO_NO_BRKTS_FREEMAIL -0.1 AWL AWL: From: address is in the auto white-list X-Headers-End: 1OuCsU-0000gc-UO Cc: rabin.vincent@stericsson.com, linux@arm.linux.org.uk, sameo@linux.intel.com, srinidhi.kasagar@stericsson.com, Lukasz.Baj@tieto.com, linux-kernel@vger.kernel.org, u.kleine-koenig@pengutronix.de, tj@kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Fri, 10 Sep 2010 23:19:58 +0000 (UTC) diff --git a/arch/arm/mach-u300/dummyspichip.c b/arch/arm/mach-u300/dummyspichip.c index 5f55012..03f7936 100644 --- a/arch/arm/mach-u300/dummyspichip.c +++ b/arch/arm/mach-u300/dummyspichip.c @@ -46,7 +46,6 @@ static ssize_t dummy_looptest(struct device *dev, * struct, this is just used here to alter the behaviour of the chip * in order to perform tests. */ - struct pl022_config_chip *chip_info = spi->controller_data; int status; u8 txbuf[14] = {0xDE, 0xAD, 0xBE, 0xEF, 0x2B, 0xAD, 0xCA, 0xFE, 0xBA, 0xBE, 0xB1, 0x05, @@ -72,7 +71,7 @@ static ssize_t dummy_looptest(struct device *dev, * Force chip to 8 bit mode * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC! */ - chip_info->data_size = SSP_DATA_BITS_8; + spi->bits_per_word = 8; /* You should NOT DO THIS EITHER */ spi->master->setup(spi); @@ -159,7 +158,7 @@ static ssize_t dummy_looptest(struct device *dev, * Force chip to 16 bit mode * WARNING: NEVER DO THIS IN REAL DRIVER CODE, THIS SHOULD BE STATIC! */ - chip_info->data_size = SSP_DATA_BITS_16; + spi->bits_per_word = 16; /* You should NOT DO THIS EITHER */ spi->master->setup(spi); diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c index f0e887b..edb2c0d 100644 --- a/arch/arm/mach-u300/spi.c +++ b/arch/arm/mach-u300/spi.c @@ -30,8 +30,6 @@ static void select_dummy_chip(u32 chipselect) } struct pl022_config_chip dummy_chip_info = { - /* Nominally this is LOOPBACK_DISABLED, but this is our dummy chip! */ - .lbm = LOOPBACK_ENABLED, /* * available POLLING_TRANSFER and INTERRUPT_TRANSFER, * DMA_TRANSFER does not work @@ -42,14 +40,8 @@ struct pl022_config_chip dummy_chip_info = { .hierarchy = SSP_MASTER, /* 0 = drive TX even as slave, 1 = do not drive TX as slave */ .slave_tx_disable = 0, - /* LSB first */ - .endian_tx = SSP_TX_LSB, - .endian_rx = SSP_RX_LSB, - .data_size = SSP_DATA_BITS_8, /* used to be 12 in some default */ .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM, .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC, - .clk_phase = SSP_CLK_SECOND_EDGE, - .clk_pol = SSP_CLK_POL_IDLE_LOW, .ctrl_len = SSP_BITS_12, .wait_state = SSP_MWIRE_WAIT_ZERO, .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, @@ -75,7 +67,7 @@ static struct spi_board_info u300_spi_devices[] = { .bus_num = 0, /* Only one bus on this chip */ .chip_select = 0, /* Means SPI_CS_HIGH, change if e.g low CS */ - .mode = 0, + .mode = SPI_MODE_1 | SPI_LSB_FIRST | SPI_LOOP, }, #endif };