From patchwork Wed Nov 17 10:44:15 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 332191 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAHB3fTI017103 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 17 Nov 2010 11:04:03 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-2.v29.ch3.sourceforge.com) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1PIfng-0003OW-SK; Wed, 17 Nov 2010 11:03:40 +0000 Received: from sog-mx-3.v43.ch3.sourceforge.com ([172.29.43.193] helo=mx.sourceforge.net) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1PIfnf-0003ON-Cg for spi-devel-general@lists.sourceforge.net; Wed, 17 Nov 2010 11:03:39 +0000 Received-SPF: pass (sog-mx-3.v43.ch3.sourceforge.com: domain of india.ti.com designates 192.94.94.40 as permitted sender) client-ip=192.94.94.40; envelope-from=a0875516@india.ti.com; helo=arroyo.ext.ti.com; Received: from arroyo.ext.ti.com ([192.94.94.40]) by sog-mx-3.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.69) id 1PIfnc-0001uE-Ld; Wed, 17 Nov 2010 11:03:37 +0000 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id oAHAiZmv031562 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 17 Nov 2010 04:44:38 -0600 Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id oAHAiV6A021940; Wed, 17 Nov 2010 16:14:32 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id oAHAiQZH030559; Wed, 17 Nov 2010 16:14:26 +0530 Received: (from a0875516@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id oAHAiQYF030556; Wed, 17 Nov 2010 16:14:26 +0530 From: Sekhar Nori To: spi-devel-general@lists.sourceforge.net Subject: [PATCH 43/49] spi: davinci: enable and power-up SPI only when required Date: Wed, 17 Nov 2010 16:14:15 +0530 Message-Id: <1289990661-30126-44-git-send-email-nsekhar@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1289990661-30126-43-git-send-email-nsekhar@ti.com> References: <1289990661-30126-1-git-send-email-nsekhar@ti.com> <1289990661-30126-2-git-send-email-nsekhar@ti.com> <1289990661-30126-3-git-send-email-nsekhar@ti.com> <1289990661-30126-4-git-send-email-nsekhar@ti.com> <1289990661-30126-5-git-send-email-nsekhar@ti.com> <1289990661-30126-6-git-send-email-nsekhar@ti.com> <1289990661-30126-7-git-send-email-nsekhar@ti.com> <1289990661-30126-8-git-send-email-nsekhar@ti.com> <1289990661-30126-9-git-send-email-nsekhar@ti.com> <1289990661-30126-10-git-send-email-nsekhar@ti.com> <1289990661-30126-11-git-send-email-nsekhar@ti.com> <1289990661-30126-12-git-send-email-nsekhar@ti.com> <1289990661-30126-13-git-send-email-nsekhar@ti.com> <1289990661-30126-14-git-send-email-nsekhar@ti.com> <1289990661-30126-15-git-send-email-nsekhar@ti.com> <1289990661-30126-16-git-send-email-nsekhar@ti.com> <1289990661-30126-17-git-send-email-nsekhar@ti.com> <1289990661-30126-18-git-send-email-nsekhar@ti.com> <1289990661-30126-19-git-send-email-nsekhar@ti.com> <1289990661-30126-20-git-send-email-nsekhar@ti.com> <1289990661-30126-21-git-send-email-nsekhar@ti.com> <1289990661-30126-22-git-send-email-nsekhar@ti.com> <1289990661-30126-23-git-send-email-nsekhar@ti.com> <1289990661-30126-24-git-send-email-nsekhar@ti.com> <1289990661-30126-25-git-send-email-nsekhar@ti.com> <1289990661-30126-26-git-send-email-nsekhar@ti.com> <1289990661-30126-27-git-send-email-nsekhar@ti.com> <1289990661-30126-28-git-send-email-nsekhar@ti.com> <1289990661-30126-29-git-send-email-nsekhar@ti.com> <1289990661-30126-30-git-send-email-nsekhar@ti.com> <1289990661-30126-31-git-send-email-nsekhar@ti.com> <1289990661-30126-32-git-send-email-nsekhar@ti.com> <1289990661-30126-33-git-send-email-nsekhar@ti.com> <1289990661-30126-34-git-send-email-nsekhar@ti.com> <1289990661-30126-35-git-send-email-nsekhar@ti.com> <1289990661-30126-36-git-send-email-nsekhar@ti.com> <1289990661-30126-37-git-send-email-nsekhar@ti.com> <1289990661-30126-38-git-send-email-nsekhar@ti.com> <1289990661-30126-39-git-send-email-nsekhar@ti.com> <1289990661-30126-40-git-send-email-nsekhar@ti.com> <1289990661-30126-41-git-send-email-nsekhar@ti.com> <1289990661-30126-42-git-send-email-nsekhar@ti.com> <1289990661-30126-43-git-send-email-nsekhar@ti.com> X-Spam-Score: -1.4 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. 0.0 SINGLE_HEADER_2K A single header contains 2K-3K characters -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record 0.1 AWL AWL: From: address is in the auto white-list X-Headers-End: 1PIfnc-0001uE-Ld Cc: davinci-linux-open-source@linux.davincidsp.com, David Brownell , Sekhar Nori X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 17 Nov 2010 11:04:03 +0000 (UTC) diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 2e74fcd..1652bba 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -49,7 +49,6 @@ #define SPIFMT_WDELAY_SHIFT 24 #define SPIFMT_PRESCALE_SHIFT 8 - /* SPIPC0 */ #define SPIPC0_DIFUN_MASK BIT(11) /* MISO */ #define SPIPC0_DOFUN_MASK BIT(10) /* MOSI */ @@ -67,6 +66,7 @@ /* SPIGCR1 */ #define SPIGCR1_CLKMOD_MASK BIT(1) #define SPIGCR1_MASTER_MASK BIT(0) +#define SPIGCR1_POWERDOWN_MASK BIT(8) #define SPIGCR1_LOOPBACK_MASK BIT(16) #define SPIGCR1_SPIENA_MASK BIT(24) @@ -556,7 +556,7 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); - /* Enable SPI */ + clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); INIT_COMPLETION(davinci_spi->done); @@ -693,6 +693,9 @@ static int davinci_spi_bufs(struct spi_device *spi, struct spi_transfer *t) clear_io_bits(davinci_spi->base + SPIINT, SPIINT_DMA_REQ_EN); } + clear_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); + set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); + /* * Check for bit error, desync error,parity error,timeout error and * receive overflow errors @@ -937,6 +940,7 @@ static int davinci_spi_probe(struct platform_device *pdev) /* master mode default */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK); set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK); + set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_POWERDOWN_MASK); ret = spi_bitbang_start(&davinci_spi->bitbang); if (ret)