From patchwork Thu Sep 1 22:04:33 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 1120782 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p81MU8ER003335 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 1 Sep 2011 22:30:32 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-2.v29.ch3.sourceforge.com) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1QzFlw-00020p-Cj; Thu, 01 Sep 2011 22:30:08 +0000 Received: from sog-mx-2.v43.ch3.sourceforge.com ([172.29.43.192] helo=mx.sourceforge.net) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1QzFlv-00020k-6F for spi-devel-general@lists.sourceforge.net; Thu, 01 Sep 2011 22:30:07 +0000 Received-SPF: fail (sog-mx-2.v43.ch3.sourceforge.com: domain of nvidia.com does not designate 70.85.31.133 as permitted sender) client-ip=70.85.31.133; envelope-from=swarren@nvidia.com; helo=avon.wwwdotorg.org; Received: from avon.wwwdotorg.org ([70.85.31.133]) by sog-mx-2.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1QzFlu-0007U2-FJ for spi-devel-general@lists.sourceforge.net; Thu, 01 Sep 2011 22:30:07 +0000 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id B9D696415; Thu, 1 Sep 2011 16:07:05 -0600 (MDT) Received: from localhost.localdomain (searspoint.nvidia.com [216.228.112.21]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id E904CE4103; Thu, 1 Sep 2011 16:04:57 -0600 (MDT) From: Stephen Warren To: Greg Kroah-Hartman , Jean Delvare , Ben Dooks , Jonathan Cameron , Grant Likely , Arnd Bergmann Subject: [PATCH V3 2/5] spi: Add irq_gpio field to struct spi_device, spi_board_info. Date: Thu, 1 Sep 2011 16:04:33 -0600 Message-Id: <1314914676-28397-7-git-send-email-swarren@nvidia.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1314914676-28397-1-git-send-email-swarren@nvidia.com> References: <1314914676-28397-1-git-send-email-swarren@nvidia.com> X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean X-Spam-Score: 4.0 (++++) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. 4.0 SPF_CHECK_FAIL SPF reports sender host as NOT permitted to send mails from 0.9 SPF_FAIL SPF: sender does not match SPF record (fail) -0.9 AWL AWL: From: address is in the auto white-list X-Headers-End: 1QzFlu-0007U2-FJ Cc: devel@driverdev.osuosl.org, Andrew Chew , Stephen Warren , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Cameron , spi-devel-general@lists.sourceforge.net, linux-tegra@vger.kernel.org, Russell King , linux-i2c@vger.kernel.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 01 Sep 2011 22:30:32 +0000 (UTC) Some devices use a single pin as both an IRQ and a GPIO. In that case, irq_gpio is the GPIO ID for that pin. Not all drivers use this feature. Where they do, and the use of this feature is optional, and the system wishes to disable this feature, this field must be explicitly set to a defined invalid GPIO ID, such as -1. Signed-off-by: Stephen Warren --- v3: New patch for v3; apply the same change to spi as for i2c per Mark Brown. drivers/spi/spi.c | 1 + include/linux/spi/spi.h | 10 ++++++++++ 2 files changed, 11 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 77eae99..9932572 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -433,6 +433,7 @@ struct spi_device *spi_new_device(struct spi_master *master, proxy->max_speed_hz = chip->max_speed_hz; proxy->mode = chip->mode; proxy->irq = chip->irq; + proxy->irq_gpio = chip->irq_gpio; strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); proxy->dev.platform_data = (void *) chip->platform_data; proxy->controller_data = chip->controller_data; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index bb4f5fb..086b591 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -50,6 +50,12 @@ extern struct bus_type spi_bus_type; * The spi_transfer.bits_per_word can override this for each transfer. * @irq: Negative, or the number passed to request_irq() to receive * interrupts from this device. + * @irq_gpio: some devices use a single pin as both an IRQ and a GPIO. In + * that case, irq_gpio is the GPIO ID for that pin. Not all drivers + * use this feature. Where they do, and the use of this feature is + * optional, and the system wishes to disable this feature, this + * field must be explicitly set to a defined invalid GPIO ID, such + * as -1. * @controller_state: Controller's runtime state * @controller_data: Board-specific definitions for controller, such as * FIFO initialization parameters; from board_info.controller_data @@ -86,6 +92,7 @@ struct spi_device { #define SPI_READY 0x80 /* slave pulls low to pause */ u8 bits_per_word; int irq; + int irq_gpio; void *controller_state; void *controller_data; char modalias[SPI_NAME_SIZE]; @@ -692,6 +699,8 @@ static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) * @controller_data: Initializes spi_device.controller_data; some * controllers need hints about hardware setup, e.g. for DMA. * @irq: Initializes spi_device.irq; depends on how the board is wired. + * @irq_gpio: Initializes spi_device.irq_gpio; depends on how the board + * is wired. * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits * from the chip datasheet and board-specific signal quality issues. * @bus_num: Identifies which spi_master parents the spi_device; unused @@ -727,6 +736,7 @@ struct spi_board_info { const void *platform_data; void *controller_data; int irq; + int irq_gpio; /* slower signaling on noisy or low voltage boards */ u32 max_speed_hz;