From patchwork Tue Jul 3 14:22:45 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Lunn X-Patchwork-Id: 1151281 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork1.kernel.org (Postfix) with ESMTP id 4A3AA3FE80 for ; Tue, 3 Jul 2012 14:25:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1Sm432-00074w-1D; Tue, 03 Jul 2012 14:25:48 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1Sm430-00074q-Uc for spi-devel-general@lists.sourceforge.net; Tue, 03 Jul 2012 14:25:46 +0000 Received-SPF: pass (sog-mx-1.v43.ch3.sourceforge.com: domain of lunn.ch designates 80.238.139.98 as permitted sender) client-ip=80.238.139.98; envelope-from=andrew@lunn.ch; helo=londo.lunn.ch; Received: from londo.lunn.ch ([80.238.139.98]) by sog-mx-1.v43.ch3.sourceforge.com with esmtp (Exim 4.76) id 1Sm42v-00069O-CM for spi-devel-general@lists.sourceforge.net; Tue, 03 Jul 2012 14:25:46 +0000 Received: from lunn by londo.lunn.ch with local (Exim 3.36 #1 (Debian)) id 1Sm40N-0005az-00; Tue, 03 Jul 2012 16:23:03 +0200 From: Andrew Lunn To: Jason Cooper Subject: [PATCH v2 12/12] Crypto: CESA: Add support for DT based instantiation. Date: Tue, 3 Jul 2012 16:22:45 +0200 Message-Id: <1341325365-21393-13-git-send-email-andrew@lunn.ch> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1341325365-21393-1-git-send-email-andrew@lunn.ch> References: <1341325365-21393-1-git-send-email-andrew@lunn.ch> X-Spam-Score: -1.3 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record 0.2 AWL AWL: From: address is in the auto white-list X-Headers-End: 1Sm42v-00069O-CM Cc: Andrew Lunn , devicetree-discuss@lists.ozlabs.org, rob.herring@calxeda.com, Michael Walle , linux-i2c@vger.kernel.org, spi-devel-general@lists.sourceforge.net, linux-arm-kernel@lists.infradead.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net Based on work by Michael Waller and Jason Cooper. Added support for getting the interrupt number from DT. Signed-off-by: Andrew Lunn --- .../devicetree/bindings/crypto/mv_cesa.txt | 18 ++++++++++++ drivers/crypto/mv_cesa.c | 31 +++++++++++++++++--- 2 files changed, 45 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/mv_cesa.txt diff --git a/Documentation/devicetree/bindings/crypto/mv_cesa.txt b/Documentation/devicetree/bindings/crypto/mv_cesa.txt new file mode 100644 index 0000000..f191122 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/mv_cesa.txt @@ -0,0 +1,18 @@ +Marvell Cryptographic Engines And Security Accelerator + +Required properties: +- compatible : should be "mrvl,orion-crypto" +- reg : base physical address of the engine and length of memory mapped + region, followed by base physical address of sram and its memory + length +- interrupts : interrupt number + +Examples: + +crypto@f1030000 { + compatible = "mrvl,orion-crypto"; + reg = <0xf1030000 0x10000 + 0xf5000000 0x800>; /* sram */ + interrupts = <22>; +}; + diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c index 1cc6b3f..964c4c5 100644 --- a/drivers/crypto/mv_cesa.c +++ b/drivers/crypto/mv_cesa.c @@ -19,6 +19,9 @@ #include #include #include +#include +#include +#include #include "mv_cesa.h" @@ -1005,7 +1008,11 @@ static int mv_probe(struct platform_device *pdev) return -EEXIST; } - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); + if (pdev->dev.of_node) + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "regs"); + else + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) return -ENXIO; @@ -1021,7 +1028,11 @@ static int mv_probe(struct platform_device *pdev) goto err; } - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); + if (pdev->dev.of_node) + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + else + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + "sram"); if (!res) { ret = -ENXIO; goto err_unmap_reg; @@ -1034,7 +1045,10 @@ static int mv_probe(struct platform_device *pdev) goto err_unmap_reg; } - irq = platform_get_irq(pdev, 0); + if (pdev->dev.of_node) + irq = irq_of_parse_and_map(pdev->dev.of_node, 0); + else + irq = platform_get_irq(pdev, 0); if (irq < 0 || irq == NO_IRQ) { ret = irq; goto err_unmap_sram; @@ -1137,12 +1151,21 @@ static int mv_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_OF +static const struct of_device_id mv_cesa_of_match_table[] __devinitdata = { + { .compatible = "marvell,orion-crypto", }, + {}, +}; +MODULE_DEVICE_TABLE(of, mv_cesa_of_match_table); +#endif + static struct platform_driver marvell_crypto = { .probe = mv_probe, - .remove = mv_remove, + .remove = __devexit_p(mv_remove), .driver = { .owner = THIS_MODULE, .name = "mv_crypto", + .of_match_table = of_match_ptr(mv_cesa_of_match_table), }, }; MODULE_ALIAS("platform:mv_crypto");