From patchwork Fri Aug 24 03:25:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1369721 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork1.kernel.org (Postfix) with ESMTP id 793813FC33 for ; Fri, 24 Aug 2012 03:26:00 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1T4kX1-0001r4-Sx; Fri, 24 Aug 2012 03:25:59 +0000 Received: from sog-mx-3.v43.ch3.sourceforge.com ([172.29.43.193] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1T4kX1-0001qz-3Q for spi-devel-general@lists.sourceforge.net; Fri, 24 Aug 2012 03:25:59 +0000 X-ACL-Warn: Received: from mail-out.m-online.net ([212.18.0.9]) by sog-mx-3.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1T4kWz-0000tF-5X for spi-devel-general@lists.sourceforge.net; Fri, 24 Aug 2012 03:25:59 +0000 Received: from frontend1.mail.m-online.net (unknown [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3X37DZ501Nz4KK65; Fri, 24 Aug 2012 05:25:50 +0200 (CEST) X-Auth-Info: 1uG/zaQ5WktVvTbvye0cVrFC/osyQU5HSyqmESbhaVM= Received: from mashiro.lan (unknown [195.140.253.167]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3X37DZ3QqXzbbht; Fri, 24 Aug 2012 05:25:50 +0200 (CEST) From: Marek Vasut To: spi-devel-general@lists.sourceforge.net Subject: [PATCH 1/2] ARM: mx28: Add SPI pinmux into imx28.dtsi Date: Fri, 24 Aug 2012 05:25:41 +0200 Message-Id: <1345778742-20994-1-git-send-email-marex@denx.de> X-Mailer: git-send-email 1.7.10.4 X-Spam-Score: -0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.18.0.9 listed in list.dnswl.org] -0.0 AWL AWL: From: address is in the auto white-list X-Headers-End: 1T4kWz-0000tF-5X Cc: Marek Vasut , Fabio Estevam , Shawn Guo , Mark Brown , Chris Ball , linux-arm-kernel@lists.infradead.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net Add this SSP pin multiplexing configuration into the imx28.dtsi file. This covers pinmux for all four SSP ports available on the i.MX28. Signed-off-by: Marek Vasut Cc: Chris Ball Cc: Fabio Estevam Cc: Mark Brown Cc: Shawn Guo --- arch/arm/boot/dts/imx28.dtsi | 61 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) NOTE: Shawn, I'd like to add this altogether. I have a board scheduled in my queue that uses other SSP ports, so I consider it pointless to split this. Fabio, what does MX28EVK use? diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 91b43e9..327a33f 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -507,6 +507,67 @@ fsl,voltage = <1>; fsl,pull-up = <0>; }; + + spi0_pins_a: spi0@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */ + 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */ + 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */ + 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */ + 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */ + 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */ + 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */ + 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */ + 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */ + 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */ + 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + spi1_pins_a: spi1@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x20c0 /* MX28_PAD_SSP1_SCK__SSP1_SCK */ + 0x20d0 /* MX28_PAD_SSP1_CMD__SSP1_CMD */ + 0x20e0 /* MX28_PAD_SSP1_DATA0__SSP1_D0 */ + 0x20f0 /* MX28_PAD_SSP1_DATA3__SSP1_D3 */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + spi2_pins_a: spi2@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */ + 0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */ + 0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */ + 0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */ + 0x2140 /* MX28_PAD_SSP2_SS1__SSP2_D4 */ + 0x2150 /* MX28_PAD_SSP2_SS2__SSP2_D5 */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; + + spi3_pins_a: spi3@0 { + reg = <0>; + fsl,pinmux-ids = < + 0x2180 /* MX28_PAD_SSP3_SCK__SSP3_SCK */ + 0x2190 /* MX28_PAD_SSP3_MOSI__SSP3_CMD */ + 0x21a0 /* MX28_PAD_SSP3_MISO__SSP3_D0 */ + 0x21b0 /* MX28_PAD_SSP3_SS0__SSP3_D3 */ + >; + fsl,drive-strength = <1>; + fsl,voltage = <1>; + fsl,pull-up = <1>; + }; }; digctl@8001c000 {