From patchwork Mon Mar 18 07:47:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Barry Song X-Patchwork-Id: 2286041 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork2.kernel.org (Postfix) with ESMTP id 97C1FDF215 for ; Mon, 18 Mar 2013 08:29:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UHVRb-0001na-0K; Mon, 18 Mar 2013 08:29:23 +0000 Received: from sog-mx-2.v43.ch3.sourceforge.com ([172.29.43.192] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UHVRa-0001nD-3g for spi-devel-general@lists.sourceforge.net; Mon, 18 Mar 2013 08:29:22 +0000 X-ACL-Warn: Received: from cluster-g.mailcontrol.com ([208.87.233.190]) by sog-mx-2.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1UHVRV-0001mg-Uv for spi-devel-general@lists.sourceforge.net; Mon, 18 Mar 2013 08:29:22 +0000 Received: from SHAASIEXC02.ASIA.ROOT.PRI ([210.13.83.101]) by rly32g.srv.mailcontrol.com (MailControl) with ESMTP id r2I7lGKe005064 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL); Mon, 18 Mar 2013 07:47:19 GMT Received: from localhost.localdomain (10.125.36.86) by asimail.csr.com (10.125.12.88) with Microsoft SMTP Server (TLS) id 14.2.318.1; Mon, 18 Mar 2013 15:47:15 +0800 From: Barry Song To: Subject: [PATCH] spi: sirf: fix the issue while transferring more than 256 words Date: Mon, 18 Mar 2013 15:47:08 +0800 Message-ID: <1363592828-6347-1-git-send-email-Barry.Song@csr.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-Originating-IP: [10.125.36.86] X-Scanned-By: MailControl 13381.65 (www.mailcontrol.com) on 10.71.0.142 X-Spam-Score: -0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-Headers-End: 1UHVRV-0001mg-Uv Cc: Qipan Li , workgroup.linux@csr.com, Zhiwu Song , Barry Song , spi-devel-general@lists.sourceforge.net, linux-arm-kernel@lists.infradead.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net From: Qipan Li currently, spi irq handler only does rx processing and fetching data from rx fifo when "FRM_END" irq happens. FRM_END indicates one transfer completes. if rx size is less than 256, it works well. but the problem is that spi rx fifo size is only 256 bytes, then if data size of one frame is more than 256, before FRM_END comes, rx fifo will be filled with RXFIFO_OFLOW overflow interrupt, it will make us lose some data due to fifo overflow. Explicitly we need do fetch work from device rx fifo in irq handler not only in "FRM_END" irq but also in "THD_REACH" irq. THD_REACH means rx fifo has come to its threshold and will come to overflow if we don't take data from it in time. In this patch, we fix this issue. we take data from rx fifo when either FRM_END or RX_THD_REACH irq comes, we put data into tx fifo when either TX_FIFO_EMPTY or TX_THD_REACH irq comes. Signed-off-by: Qipan Li Signed-off-by: Zhiwu Song Signed-off-by: Barry Song --- drivers/spi/spi-sirf.c | 43 +++++++++++++------------------------------ 1 files changed, 13 insertions(+), 30 deletions(-) diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index f59d417..d2bd1e5 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c @@ -142,9 +142,6 @@ struct sirfsoc_spi { unsigned int left_tx_cnt; unsigned int left_rx_cnt; - /* tasklet to push tx msg into FIFO */ - struct tasklet_struct tasklet_tx; - int chipselect[0]; }; @@ -236,17 +233,6 @@ static void spi_sirfsoc_tx_word_u32(struct sirfsoc_spi *sspi) sspi->left_tx_cnt--; } -static void spi_sirfsoc_tasklet_tx(unsigned long arg) -{ - struct sirfsoc_spi *sspi = (struct sirfsoc_spi *)arg; - - /* Fill Tx FIFO while there are left words to be transmitted */ - while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) & - SIRFSOC_SPI_FIFO_FULL)) && - sspi->left_tx_cnt) - sspi->tx_word(sspi); -} - static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) { struct sirfsoc_spi *sspi = dev_id; @@ -261,25 +247,25 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); } - if (spi_stat & SIRFSOC_SPI_FRM_END) { + if (spi_stat & (SIRFSOC_SPI_FRM_END + | SIRFSOC_SPI_RXFIFO_THD_REACH)) while (!((readl(sspi->base + SIRFSOC_SPI_RXFIFO_STATUS) & SIRFSOC_SPI_FIFO_EMPTY)) && sspi->left_rx_cnt) sspi->rx_word(sspi); - /* Received all words */ - if ((sspi->left_rx_cnt == 0) && (sspi->left_tx_cnt == 0)) { - complete(&sspi->done); - writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); - } - } - - if (spi_stat & SIRFSOC_SPI_RXFIFO_THD_REACH || - spi_stat & SIRFSOC_SPI_TXFIFO_THD_REACH || - spi_stat & SIRFSOC_SPI_RX_FIFO_FULL || - spi_stat & SIRFSOC_SPI_TXFIFO_EMPTY) - tasklet_schedule(&sspi->tasklet_tx); + if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY + | SIRFSOC_SPI_TXFIFO_THD_REACH)) + while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) + & SIRFSOC_SPI_FIFO_FULL)) && + sspi->left_tx_cnt) + sspi->tx_word(sspi); + /* Received all words */ + if ((sspi->left_rx_cnt == 0) && (sspi->left_tx_cnt == 0)) { + complete(&sspi->done); + writel(0x0, sspi->base + SIRFSOC_SPI_INT_EN); + } return IRQ_HANDLED; } @@ -573,9 +559,6 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) init_completion(&sspi->done); - tasklet_init(&sspi->tasklet_tx, spi_sirfsoc_tasklet_tx, - (unsigned long)sspi); - writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_RXFIFO_OP); writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_RXFIFO_OP);