| Message ID | 1364822309-28386-1-git-send-email-broonie@opensource.wolfsonmicro.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On 04/01/2013 07:18 AM, Mark Brown wrote: > The core can do the validation for us. Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> ------------------------------------------------------------------------------ Own the Future-Intel(R) Level Up Game Demo Contest 2013 Rise to greatness in Intel's independent game demo contest. Compete for recognition, cash, and the chance to get your game on Steam. $5K grand prize plus 10 genre and skill prizes. Submit your demo by 6/6/13. http://altfarm.mediaplex.com/ad/ck/12124-176961-30367-2
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 7f5f8ee..27ff669 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -911,15 +911,6 @@ static int s3c64xx_spi_setup(struct spi_device *spi) spin_unlock_irqrestore(&sdd->lock, flags); - if (spi->bits_per_word != 8 - && spi->bits_per_word != 16 - && spi->bits_per_word != 32) { - dev_err(&spi->dev, "setup: %dbits/wrd not supported!\n", - spi->bits_per_word); - err = -EINVAL; - goto setup_exit; - } - pm_runtime_get_sync(&sdd->pdev->dev); /* Check if we can provide the requested rate */ @@ -1237,6 +1228,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) master->unprepare_transfer_hardware = s3c64xx_spi_unprepare_transfer; master->num_chipselect = sci->num_cs; master->dma_alignment = 8; + master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
The core can do the validation for us. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> --- drivers/spi/spi-s3c64xx.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)