From patchwork Mon Apr 1 15:31:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anatolij Gustschin X-Patchwork-Id: 2371291 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork1.kernel.org (Postfix) with ESMTP id 7B3313FD40 for ; Mon, 1 Apr 2013 15:31:34 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UMgho-00052o-1R; Mon, 01 Apr 2013 15:31:32 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UMghl-00052i-IR for spi-devel-general@lists.sourceforge.net; Mon, 01 Apr 2013 15:31:29 +0000 X-ACL-Warn: Received: from mail-out.m-online.net ([212.18.0.10]) by sog-mx-1.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1UMghj-0003tM-Dr for spi-devel-general@lists.sourceforge.net; Mon, 01 Apr 2013 15:31:29 +0000 Received: from frontend1.mail.m-online.net (frontend1.mail.intern.m-online.net [192.168.8.180]) by mail-out.m-online.net (Postfix) with ESMTP id 3Zfcw86ddHz3hhl9; Mon, 1 Apr 2013 17:31:20 +0200 (CEST) X-Auth-Info: tr+31nQIzxqB5Vom7XLXW361nT7X+czX5ECM0euMkY4= Received: from localhost (p4FC468AB.dip.t-dialin.net [79.196.104.171]) (using TLSv1 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA id 3Zfcw85MtzzbfQF; Mon, 1 Apr 2013 17:31:20 +0200 (CEST) From: Anatolij Gustschin To: spi-devel-general@lists.sourceforge.net, Mark Brown Subject: [PATCH] spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop Date: Mon, 1 Apr 2013 17:31:19 +0200 Message-Id: <1364830279-15130-1-git-send-email-agust@denx.de> X-Mailer: git-send-email 1.7.5.4 X-Spam-Score: 0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.18.0.10 listed in list.dnswl.org] X-Headers-End: 1UMghj-0003tM-Dr Cc: Anatolij Gustschin X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net There is no need to disable transmitter/receiver after each loop iteration and re-enable it for next loop iteration. Enable the transmitter/receiver before xfer loop starts and disable it when the whole transfer is done. Signed-off-by: Anatolij Gustschin --- drivers/spi/spi-mpc512x-psc.c | 10 +++------- 1 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c index 3e490ee..0ea7c81 100644 --- a/drivers/spi/spi-mpc512x-psc.c +++ b/drivers/spi/spi-mpc512x-psc.c @@ -148,6 +148,9 @@ static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi, in_8(&psc->mode); out_8(&psc->mode, 0x0); + /* enable transmiter/receiver */ + out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); + while (len) { int count; int i; @@ -176,10 +179,6 @@ static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi, out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY); out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY); - /* enable transmiter/receiver */ - out_8(&psc->command, - MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); - wait_for_completion(&mps->done); mdelay(1); @@ -204,9 +203,6 @@ static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi, while (in_be32(&fifo->rxcnt)) { in_8(&fifo->rxdata_8); } - - out_8(&psc->command, - MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE); } /* disable transmiter/receiver and fifo interrupt */ out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);