| Message ID | 1374141687-10790-4-git-send-email-sourav.poddar@ti.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
On Thursday 18 July 2013 04:14 PM, Mark Brown wrote: > On Thu, Jul 18, 2013 at 03:31:27PM +0530, Sourav Poddar wrote: >> Since, qspi controller uses quad read. >> >> Configuring the command register, if the transfer of data needs >> dual or quad lines. >> >> This patch has been done on top of the following patch[1], which is just the >> basic idea of adding dual/quad support in spi framework. >> $subject patch will undergo changes as the parent patch goes[1] >> >> [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047 > Just as with commit IDs you should include a plain text description of > anything you link to so that people reading your e-mail can tell what > you're talking about without going on line. Ok, will keep that in mind for future. Just to give you a brief description here, Requirement is to have a dual/quad support in spi frameowrk, so that drivers can use multiple lines for data transfers. What patch[1] tries to does, is [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047 is to add to each transfer the bitwidth it supports, so that that bitwidth information can be parsed in controller driver and can be used for respective read/writes. A typical usecase on my side is, I have a spansion flash connected to qspi. Flash device supports quad read with a certain read opcode(QUAD_READ). So, Whenever the opcode send is QUAD_READ, we will append that information as a bitwidth to the spi transfer. This information will be parsed by the controller driver and will be used to configure the cmd reg to do the particular type of reads. ------------------------------------------------------------------------------ See everything from the browser to the database with AppDynamics Get end-to-end visibility with application monitoring from AppDynamics Isolate bottlenecks and diagnose root cause in seconds. Start your free trial of AppDynamics Pro today! http://pubads.g.doubleclick.net/gampad/clk?id=48808831&iu=/4140/ostg.clktrk
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 3cae731..3a5c56d 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -86,6 +86,7 @@ struct ti_qspi { #define QSPI_3_PIN (1 << 18) #define QSPI_RD_SNGL (1 << 16) #define QSPI_WR_SNGL (2 << 16) +#define QSPI_RD_DUAL (3 << 16) #define QSPI_RD_QUAD (7 << 16) #define QSPI_INVAL (4 << 16) #define QSPI_WC_CMD_INT_EN (1 << 14) @@ -280,6 +281,7 @@ static void qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) { u8 *rxbuf; int wlen, count; + unsigned cmd = qspi->cmd; count = t->len; rxbuf = t->rx_buf; @@ -289,8 +291,19 @@ static void qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", qspi->cmd | QSPI_RD_SNGL, qspi->dc); ti_qspi_writel(qspi, qspi->dc, QSPI_SPI_DC_REG); - ti_qspi_writel(qspi, qspi->cmd | QSPI_RD_SNGL, - QSPI_SPI_CMD_REG); + switch (t->bitwidth) { + case SPI_BITWIDTH_QUAD: + cmd |= QSPI_RD_QUAD; + break; + case SPI_BITWIDTH_DUAL: + cmd |= QSPI_RD_DUAL; + break; + case SPI_BITWIDTH_SINGLE: + default: + cmd |= QSPI_RD_SNGL; + } + + ti_qspi_writel(qspi, cmd, QSPI_SPI_CMD_REG); ti_qspi_writel(qspi, QSPI_WC_INT_EN, QSPI_INTR_ENABLE_SET_REG); wait_for_completion(&qspi->transfer_complete); *rxbuf++ = ti_qspi_readl_data(qspi, QSPI_SPI_DATA_REG, wlen);
Since, qspi controller uses quad read. Configuring the command register, if the transfer of data needs dual or quad lines. This patch has been done on top of the following patch[1], which is just the basic idea of adding dual/quad support in spi framework. $subject patch will undergo changes as the parent patch goes[1] [1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14047 Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> --- v1->v2 Added support for dual also. drivers/spi/spi-ti-qspi.c | 17 +++++++++++++++-- 1 files changed, 15 insertions(+), 2 deletions(-)