From patchwork Tue Mar 11 09:40:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 3809941 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 91E0F9F525 for ; Tue, 11 Mar 2014 09:40:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C0FEF20220 for ; Tue, 11 Mar 2014 09:40:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 357A120221 for ; Tue, 11 Mar 2014 09:40:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752787AbaCKJkz (ORCPT ); Tue, 11 Mar 2014 05:40:55 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:52366 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752010AbaCKJkz (ORCPT ); Tue, 11 Mar 2014 05:40:55 -0400 Received: from ayla.of.borg ([84.193.72.141]) by michel.telenet-ops.be with bizsmtp id c9gs1n00T32ts5g069gsUD; Tue, 11 Mar 2014 10:40:53 +0100 Received: from geert by ayla.of.borg with local (Exim 4.76) (envelope-from ) id 1WNJB6-0005H2-5L; Tue, 11 Mar 2014 10:40:52 +0100 From: Geert Uytterhoeven To: Mark Brown Cc: Simon Horman , devicetree@vger.kernel.org, linux-spi@vger.kernel.org, linux-sh@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 resend] spi: hs-spi: Improve bindings Date: Tue, 11 Mar 2014 10:40:51 +0100 Message-Id: <1394530851-20244-1-git-send-email-geert@linux-m68k.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Geert Uytterhoeven - Add future-proof "renesas,hspi-" compatible values, - Add missing "interrupt-parent", "#address-cells", and "#size-cells" properties, - Add reference to pinctrl documentation, - Add example bindings. Signed-off-by: Geert Uytterhoeven --- Mark: Can you please ack and take this, so Simon can apply the patches that use these bindings? Thx! v3: - Split in two patches: bindings and dtsi updates v2: - Add Tested-by - List full example compatible properties with soctypes instead of just the soctypes, so checkpatch can validate DTSes. Documentation/devicetree/bindings/spi/sh-hspi.txt | 28 ++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/sh-hspi.txt b/Documentation/devicetree/bindings/spi/sh-hspi.txt index 30b57b1c8a13..319bad4af875 100644 --- a/Documentation/devicetree/bindings/spi/sh-hspi.txt +++ b/Documentation/devicetree/bindings/spi/sh-hspi.txt @@ -1,7 +1,29 @@ Renesas HSPI. Required properties: -- compatible : "renesas,hspi" -- reg : Offset and length of the register set for the device -- interrupts : interrupt line used by HSPI +- compatible : "renesas,hspi-", "renesas,hspi" as fallback. + Examples with soctypes are: + - "renesas,hspi-r8a7778" (R-Car M1) + - "renesas,hspi-r8a7779" (R-Car H1) +- reg : Offset and length of the register set for the device +- interrupt-parent : The phandle for the interrupt controller that + services interrupts for this device +- interrupts : Interrupt specifier +- #address-cells : Must be <1> +- #size-cells : Must be <0> + +Pinctrl properties might be needed, too. See +Documentation/devicetree/bindings/pinctrl/renesas,*. + +Example: + + hspi0: spi@fffc7000 { + compatible = "renesas,hspi-r8a7778", "renesas,hspi"; + reg = <0xfffc7000 0x18>; + interrupt-parent = <&gic>; + interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + };