From patchwork Thu Aug 28 23:43:48 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 4808381 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5871AC0338 for ; Thu, 28 Aug 2014 23:44:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3AD772011E for ; Thu, 28 Aug 2014 23:44:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5D22F200FF for ; Thu, 28 Aug 2014 23:44:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751559AbaH1XoH (ORCPT ); Thu, 28 Aug 2014 19:44:07 -0400 Received: from mail-pa0-f41.google.com ([209.85.220.41]:65277 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750958AbaH1XoG (ORCPT ); Thu, 28 Aug 2014 19:44:06 -0400 Received: by mail-pa0-f41.google.com with SMTP id lj1so4517626pab.28 for ; Thu, 28 Aug 2014 16:44:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=TB6lfFpWct4NDDw3rzfA3DnUwACzyD1ZeWuuKYUVztE=; b=DJQ7Y6ma4cMogPfK1FckmwheXy6mk5SK98PaBMPuvfN3otXYLC31c6iCCGivn0Ocqg iTX/j+voj/shbq8iBGERtlbXisy65U/ntmTSjVlahcuyFaqrwYw34Ro3998vlOFS4J9l mGBpKxcLV/v0USDZcwjJmfZ8TOlfHNLbnTheY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=TB6lfFpWct4NDDw3rzfA3DnUwACzyD1ZeWuuKYUVztE=; b=HY0o0j78iuh6Fix4/msypgoo1IH+zPH094pv0P7VbCi9DQYB0QObI+9x/S8YhJRt86 +hprB1et/+JNRgYBVToX4EDEdtPzCgwF7OuIaogO/8lgJc04480rhSbB0kuKzJe9tI2a Oh4Z5O9hZweBVokhtLa1DanzyQV5UBMDIhj1yUCHZdN7Xbc0UnTVErs+R3mO2gmZRDhE WFkIPwZIjgPWaEiweSEdU6pF9aKYbwZ2i9i0hRhad9Ue1tUj8gjWrHVz132mkt9rYsB1 u/moEANnE4wxoAwXHwGUP0ksyUzH7TzWCrZ9eUvSEyTVhcXK1XS2u2bQnrXGRNyDWv9Q kONA== X-Gm-Message-State: ALoCoQmLctl8r4oocYxI3HBWjid7L6O7kSfn6nt79t2lAzmMSW7XQx0hk3B3XVmHBDPFxMu7Pji1 X-Received: by 10.68.69.109 with SMTP id d13mr10570859pbu.111.1409269445434; Thu, 28 Aug 2014 16:44:05 -0700 (PDT) Received: from tictac.mtv.corp.google.com (tictac.mtv.corp.google.com [172.22.162.15]) by mx.google.com with ESMTPSA id q13sm7279212pdj.44.2014.08.28.16.44.04 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Aug 2014 16:44:04 -0700 (PDT) From: Doug Anderson To: Mark Brown , Addy Ke , Heiko Stuebner Cc: "Jeffy.Chen" , Sonny Rao , Dmitry Torokhov , amstan@chromium.org, Doug Anderson , linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] spi/rockchip: Avoid accidentally turning off the clock Date: Thu, 28 Aug 2014 16:43:48 -0700 Message-Id: <1409269428-24680-1-git-send-email-dianders@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If our client is requesting a clock that is above the maximum clock then the following division will result in 0: rs->max_freq / rs->speed We'll then program 0 into the SPI_BAUDR register. The Rockchip TRM says: "If the value is 0, the serial output clock (sclk_out) is disabled." It's much better to end up with the fastest possible clock rather than a clock that is off, so enforce a minimum value. Signed-off-by: Doug Anderson --- drivers/spi/spi-rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 6321326..cd0e08b0 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -499,7 +499,7 @@ static void rockchip_spi_config(struct rockchip_spi *rs) } /* div doesn't support odd number */ - div = rs->max_freq / rs->speed; + div = max_t(u32, rs->max_freq / rs->speed, 1); div = (div + 1) & 0xfffe; spi_enable_chip(rs, 0);