From patchwork Tue Oct 28 16:25:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 5178291 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0A5EEC11AC for ; Tue, 28 Oct 2014 16:25:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1A9FD20219 for ; Tue, 28 Oct 2014 16:25:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 28237201D3 for ; Tue, 28 Oct 2014 16:25:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750939AbaJ1QZI (ORCPT ); Tue, 28 Oct 2014 12:25:08 -0400 Received: from mga02.intel.com ([134.134.136.20]:29900 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751547AbaJ1QZH (ORCPT ); Tue, 28 Oct 2014 12:25:07 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 28 Oct 2014 09:25:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,803,1406617200"; d="scan'208";a="597757648" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.173]) by orsmga001.jf.intel.com with ESMTP; 28 Oct 2014 09:25:03 -0700 Received: from andy by smile with local (Exim 4.84) (envelope-from ) id 1Xj9Zu-0000AU-I4; Tue, 28 Oct 2014 18:25:02 +0200 From: Andy Shevchenko To: Mark Brown , linux-spi@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v1 2/2] spi: dw-mid: split rx and tx callbacks when DMA Date: Tue, 28 Oct 2014 18:25:02 +0200 Message-Id: <1414513502-595-3-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1414513502-595-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1414513502-595-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently driver wouldn't work properly if user asked for simplex transfer. The patch separates DMA rx and tx callbacks and finishes transfer correctly in any case. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-dw-mid.c | 53 +++++++++++++++++++++++++++++++++++------------- drivers/spi/spi-dw.h | 2 +- 2 files changed, 40 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index c8319ab..7281316 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -26,6 +26,9 @@ #include #include +#define RX_BUSY 0 +#define TX_BUSY 1 + struct mid_dma { struct intel_mid_dma_slave dmas_tx; struct intel_mid_dma_slave dmas_rx; @@ -98,15 +101,14 @@ static void mid_spi_dma_exit(struct dw_spi *dws) } /* - * dws->dma_chan_done is cleared before the dma transfer starts, - * callback for rx/tx channel will each increment it by 1. - * Reaching 2 means the whole spi transaction is done. + * dws->dma_chan_busy is set before the dma transfer starts, callback for tx + * channel will clear a corresponding bit. */ -static void dw_spi_dma_done(void *arg) +static void dw_spi_dma_tx_done(void *arg) { struct dw_spi *dws = arg; - if (++dws->dma_chan_done != 2) + if (test_and_clear_bit(TX_BUSY, &dws->dma_chan_busy) & BIT(RX_BUSY)) return; dw_spi_xfer_done(dws); } @@ -116,6 +118,9 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws) struct dma_slave_config txconf; struct dma_async_tx_descriptor *txdesc; + if (!dws->tx_dma) + return NULL; + txconf.direction = DMA_MEM_TO_DEV; txconf.dst_addr = dws->dma_addr; txconf.dst_maxburst = LNW_DMA_MSIZE_16; @@ -134,17 +139,33 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws) 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); - txdesc->callback = dw_spi_dma_done; + txdesc->callback = dw_spi_dma_tx_done; txdesc->callback_param = dws; return txdesc; } +/* + * dws->dma_chan_busy is set before the dma transfer starts, callback for rx + * channel will clear a corresponding bit. + */ +static void dw_spi_dma_rx_done(void *arg) +{ + struct dw_spi *dws = arg; + + if (test_and_clear_bit(RX_BUSY, &dws->dma_chan_busy) & BIT(TX_BUSY)) + return; + dw_spi_xfer_done(dws); +} + static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws) { struct dma_slave_config rxconf; struct dma_async_tx_descriptor *rxdesc; + if (!dws->rx_dma) + return NULL; + rxconf.direction = DMA_DEV_TO_MEM; rxconf.src_addr = dws->dma_addr; rxconf.src_maxburst = LNW_DMA_MSIZE_16; @@ -163,7 +184,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws) 1, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); - rxdesc->callback = dw_spi_dma_done; + rxdesc->callback = dw_spi_dma_rx_done; rxdesc->callback_param = dws; return rxdesc; @@ -195,8 +216,6 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) if (cs_change) dw_spi_dma_setup(dws); - dws->dma_chan_done = 0; - /* 2. Prepare the TX dma transfer */ txdesc = dw_spi_dma_prepare_tx(dws); @@ -204,11 +223,17 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) rxdesc = dw_spi_dma_prepare_rx(dws); /* rx must be started before tx due to spi instinct */ - dmaengine_submit(rxdesc); - dma_async_issue_pending(dws->rxchan); - - dmaengine_submit(txdesc); - dma_async_issue_pending(dws->txchan); + if (rxdesc) { + set_bit(RX_BUSY, &dws->dma_chan_busy); + dmaengine_submit(rxdesc); + dma_async_issue_pending(dws->rxchan); + } + + if (txdesc) { + set_bit(TX_BUSY, &dws->dma_chan_busy); + dmaengine_submit(txdesc); + dma_async_issue_pending(dws->txchan); + } return 0; } diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 83a103a..3d32be6 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -139,7 +139,7 @@ struct dw_spi { struct scatterlist tx_sgl; struct dma_chan *rxchan; struct scatterlist rx_sgl; - int dma_chan_done; + unsigned long dma_chan_busy; struct device *dma_dev; dma_addr_t dma_addr; /* phy address of the Data register */ struct dw_spi_dma_ops *dma_ops;