Message ID | 1416237423-3606-1-git-send-email-21cnbao@gmail.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 9c4b19a07dddda3ba35a2eb9b4134d485908e2f5 |
Headers | show |
On Mon, Nov 17, 2014 at 11:17:02PM +0800, Barry Song wrote: > From: Qipan Li <Qipan.Li@csr.com> > > commit 8c328a262f ("spi: sirf: Avoid duplicate code in various > bits_per_word cases") is wrong in setting data width register of > fifo is not right, it should use sspi->word_width >> 1 to set > related bits. According to hardware spec, the mapping between > register value and data width: Applied, thanks.
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index 39e2c0a..f63de78 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c @@ -562,9 +562,9 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) sspi->word_width = DIV_ROUND_UP(bits_per_word, 8); txfifo_ctrl = SIRFSOC_SPI_FIFO_THD(SIRFSOC_SPI_FIFO_SIZE / 2) | - sspi->word_width; + (sspi->word_width >> 1); rxfifo_ctrl = SIRFSOC_SPI_FIFO_THD(SIRFSOC_SPI_FIFO_SIZE / 2) | - sspi->word_width; + (sspi->word_width >> 1); if (!(spi->mode & SPI_CS_HIGH)) regval |= SIRFSOC_SPI_CS_IDLE_STAT;