From patchwork Wed Jan 14 07:25:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 5629001 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id CBDB79F2ED for ; Wed, 14 Jan 2015 08:45:11 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F3EBB203A4 for ; Wed, 14 Jan 2015 08:45:10 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C509E201FB for ; Wed, 14 Jan 2015 08:45:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753648AbbANIpI (ORCPT ); Wed, 14 Jan 2015 03:45:08 -0500 Received: from mail-pd0-f179.google.com ([209.85.192.179]:52874 "EHLO mail-pd0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753613AbbANHZz (ORCPT ); Wed, 14 Jan 2015 02:25:55 -0500 Received: by mail-pd0-f179.google.com with SMTP id fp1so8180984pdb.10 for ; Tue, 13 Jan 2015 23:25:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=3yz2+ScRu91bJI8QT8dSBHgE6xodQ0ChAZcesWx8Z9I=; b=G+IasoqehxxBSSfy9BYbYuqaC7l1NIf3c9MiOP/ImxZhn7IDRzarsQ5/1YU3BssWGE 8UIOEMmxQThrJ9TOMkXXnoXEj3MMBWXy3rWOSRfhGiqyRLN9KadBV4aup+mImWnSxNWC OjrDizI2uLvZzkF2cD+WI4jTUG+wJwODE49H20g+0d/k36Q91t8g0ucTwe/CfNQToynK M+75aR5esgtmCEtM6kNE37lW0q7sfJoSGl4GIIxHMSCB9Sg5Td3pm4LGPKvX4F+9HMi/ uKg3BgogRLPEtxLyqXF1fhfw3rOiDAw1jjD3etuIslDu9JyogBGiEqE2FGGMqnFH/Tpm argg== X-Gm-Message-State: ALoCoQkrjiG7ihWsAarGOwUhM9W2lRvgWwNcylcxhVIm05WSYVNwHZTk68pm0rebk/zQf19Fs4hr X-Received: by 10.68.129.134 with SMTP id nw6mr3601262pbb.132.1421220355115; Tue, 13 Jan 2015 23:25:55 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id ji5sm18814720pbd.22.2015.01.13.23.25.52 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 13 Jan 2015 23:25:53 -0800 (PST) From: Nobuhiro Iwamatsu To: linux-spi@vger.kernel.org Cc: linux-sh@vger.kernel.org, geert@glider.be, yoshihiro.shimoda.uh@renesas.com, Nobuhiro Iwamatsu Subject: [PATCH] spi: sh-msiof: Update calculation of frequency dividing Date: Wed, 14 Jan 2015 16:25:35 +0900 Message-Id: <1421220335-22503-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.3 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP sh-msiof of frequency dividing does not perform the calculation, driver have to manage setting value in the table. It is not possible to set frequency dividing value close to the actual data in this way. This changes from frequency dividing of table management to setting by calculation. This driver is able to set a value close to the actual data. Signed-off-by: Nobuhiro Iwamatsu --- drivers/spi/spi-sh-msiof.c | 39 +++++++++++++++++---------------------- 1 file changed, 17 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 96a5fc0..58b1bfe 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -241,42 +241,37 @@ static irqreturn_t sh_msiof_spi_irq(int irq, void *data) static struct { unsigned short div; - unsigned short scr; -} const sh_msiof_spi_clk_table[] = { - { 1, SCR_BRPS( 1) | SCR_BRDV_DIV_1 }, - { 2, SCR_BRPS( 1) | SCR_BRDV_DIV_2 }, - { 4, SCR_BRPS( 1) | SCR_BRDV_DIV_4 }, - { 8, SCR_BRPS( 1) | SCR_BRDV_DIV_8 }, - { 16, SCR_BRPS( 1) | SCR_BRDV_DIV_16 }, - { 32, SCR_BRPS( 1) | SCR_BRDV_DIV_32 }, - { 64, SCR_BRPS(32) | SCR_BRDV_DIV_2 }, - { 128, SCR_BRPS(32) | SCR_BRDV_DIV_4 }, - { 256, SCR_BRPS(32) | SCR_BRDV_DIV_8 }, - { 512, SCR_BRPS(32) | SCR_BRDV_DIV_16 }, - { 1024, SCR_BRPS(32) | SCR_BRDV_DIV_32 }, + unsigned short brdv; +} const sh_msiof_spi_div_table[] = { + { 1, SCR_BRDV_DIV_1 }, + { 2, SCR_BRDV_DIV_2 }, + { 4, SCR_BRDV_DIV_4 }, + { 8, SCR_BRDV_DIV_8 }, + { 16, SCR_BRDV_DIV_16 }, + { 32, SCR_BRDV_DIV_32 }, }; static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p, unsigned long parent_rate, u32 spi_hz) { unsigned long div = 1024; + unsigned long brps, scr; size_t k; if (!WARN_ON(!spi_hz || !parent_rate)) div = DIV_ROUND_UP(parent_rate, spi_hz); - /* TODO: make more fine grained */ - - for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_clk_table); k++) { - if (sh_msiof_spi_clk_table[k].div >= div) - break; + for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_div_table); k++) { + brps = DIV_ROUND_UP(div, sh_msiof_spi_div_table[k].div); + if (brps > 32) /* max of brsv is 32 */ + continue; + break; } - k = min_t(int, k, ARRAY_SIZE(sh_msiof_spi_clk_table) - 1); - - sh_msiof_write(p, TSCR, sh_msiof_spi_clk_table[k].scr); + scr = sh_msiof_spi_div_table[k].brdv | (brps -1) << 8; + sh_msiof_write(p, TSCR, scr); if (!(p->chipdata->master_flags & SPI_MASTER_MUST_TX)) - sh_msiof_write(p, RSCR, sh_msiof_spi_clk_table[k].scr); + sh_msiof_write(p, RSCR, scr); } static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,