From patchwork Wed Mar 4 20:31:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tthayer@opensource.altera.com X-Patchwork-Id: 5940401 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 186A19F318 for ; Wed, 4 Mar 2015 21:04:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1134F2034F for ; Wed, 4 Mar 2015 21:04:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E003820303 for ; Wed, 4 Mar 2015 21:04:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751718AbbCDVEm (ORCPT ); Wed, 4 Mar 2015 16:04:42 -0500 Received: from mail-bl2on0097.outbound.protection.outlook.com ([65.55.169.97]:27376 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751616AbbCDVEk (ORCPT ); Wed, 4 Mar 2015 16:04:40 -0500 X-Greylist: delayed 1995 seconds by postgrey-1.27 at vger.kernel.org; Wed, 04 Mar 2015 16:04:39 EST Received: from localhost.localdomain (64.129.157.38) by BY2PR03MB428.namprd03.prod.outlook.com (10.141.141.151) with Microsoft SMTP Server (TLS) id 15.1.112.13; Wed, 4 Mar 2015 20:31:31 +0000 From: To: , , , , , , , CC: , , , , , , , , , Subject: [RFC/PATCH 2/2] spi: dw-spi: Pointers select 16b vs. 32b DesignWare access Date: Wed, 4 Mar 2015 14:31:15 -0600 Message-ID: <1425501075-17081-3-git-send-email-tthayer@opensource.altera.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1425501075-17081-1-git-send-email-tthayer@opensource.altera.com> References: <1425501075-17081-1-git-send-email-tthayer@opensource.altera.com> MIME-Version: 1.0 X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BLUPR01CA034.prod.exchangelabs.com (25.160.23.24) To BY2PR03MB428.namprd03.prod.outlook.com (10.141.141.151) Authentication-Results: kernel.org; dkim=none (message not signed) header.d=none; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BY2PR03MB428; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5005006); SRVR:BY2PR03MB428; BCL:0; PCL:0; RULEID:; SRVR:BY2PR03MB428; X-Forefront-PRVS: 0505147DDB X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6069001)(6009001)(42186005)(86362001)(87976001)(92566002)(47776003)(50466002)(66066001)(76176999)(50986999)(48376002)(40100003)(19580395003)(46102003)(33646002)(50226001)(86152002)(2201001)(229853001)(77156002)(62966003)(19580405001)(2950100001)(122386002)(77096005); DIR:OUT; SFP:1101; SCL:1; SRVR:BY2PR03MB428; H:localhost.localdomain; FPR:; SPF:None; MLV:sfv; LANG:en; X-OriginatorOrg: opensource.altera.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Mar 2015 20:31:31.9346 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY2PR03MB428 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thor Thayer Altera's Arria10 SoC requires a 32 bit access for peripherals. The current spi-dw driver uses 16bit accesses in some locations. Use function pointers to support 32 bit accesses and not break legacy 16 bit access. Signed-off-by: Thor Thayer --- drivers/spi/spi-dw-mmio.c | 7 ++++++- drivers/spi/spi-dw.c | 38 ++++++++++++++++++++++---------------- drivers/spi/spi-dw.h | 10 ++++++---- 3 files changed, 34 insertions(+), 21 deletions(-) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index eb03e12..ee77005 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -76,8 +76,13 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) num_cs = 4; - if (pdev->dev.of_node) + if (pdev->dev.of_node) { of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); + if (of_property_read_bool(pdev->dev.of_node, "32bit_access")) { + dws->dwread = dw_readl; + dws->dwwrite = dw_writel; + } + } dws->num_cs = num_cs; diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index 05af817..614de7f 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -149,7 +149,7 @@ static inline u32 tx_max(struct dw_spi *dws) u32 tx_left, tx_room, rxtx_gap; tx_left = (dws->tx_end - dws->tx) / dws->n_bytes; - tx_room = dws->fifo_len - dw_readw(dws, DW_SPI_TXFLR); + tx_room = dws->fifo_len - dws->dwread(dws, DW_SPI_TXFLR); /* * Another concern is about the tx/rx mismatch, we @@ -170,7 +170,7 @@ static inline u32 rx_max(struct dw_spi *dws) { u32 rx_left = (dws->rx_end - dws->rx) / dws->n_bytes; - return min_t(u32, rx_left, dw_readw(dws, DW_SPI_RXFLR)); + return min_t(u32, rx_left, dws->dwread(dws, DW_SPI_RXFLR)); } static void dw_writer(struct dw_spi *dws) @@ -186,7 +186,7 @@ static void dw_writer(struct dw_spi *dws) else txw = *(u16 *)(dws->tx); } - dw_writew(dws, DW_SPI_DR, txw); + dws->dwwrite(dws, DW_SPI_DR, txw); dws->tx += dws->n_bytes; } } @@ -194,10 +194,10 @@ static void dw_writer(struct dw_spi *dws) static void dw_reader(struct dw_spi *dws) { u32 max = rx_max(dws); - u16 rxw; + u32 rxw; while (max--) { - rxw = dw_readw(dws, DW_SPI_DR); + rxw = dws->dwread(dws, DW_SPI_DR); /* Care rx only if the transfer's original "rx" is not null */ if (dws->rx_end - dws->len) { if (dws->n_bytes == 1) @@ -299,13 +299,13 @@ EXPORT_SYMBOL_GPL(dw_spi_xfer_done); static irqreturn_t interrupt_transfer(struct dw_spi *dws) { - u16 irq_status = dw_readw(dws, DW_SPI_ISR); + u32 irq_status = dws->dwread(dws, DW_SPI_ISR); /* Error handling */ if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) { - dw_readw(dws, DW_SPI_TXOICR); - dw_readw(dws, DW_SPI_RXOICR); - dw_readw(dws, DW_SPI_RXUICR); + dws->dwread(dws, DW_SPI_TXOICR); + dws->dwread(dws, DW_SPI_RXOICR); + dws->dwread(dws, DW_SPI_RXUICR); int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun"); return IRQ_HANDLED; } @@ -329,7 +329,7 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws) static irqreturn_t dw_spi_irq(int irq, void *dev_id) { struct dw_spi *dws = dev_id; - u16 irq_status = dw_readw(dws, DW_SPI_ISR) & 0x3f; + u32 irq_status = dws->dwread(dws, DW_SPI_ISR) & 0x3f; if (!irq_status) return IRQ_NONE; @@ -473,10 +473,11 @@ static void pump_transfers(unsigned long data) * 2. clk_div is changed * 3. control value changes */ - if (dw_readw(dws, DW_SPI_CTRL0) != cr0 || cs_change || clk_div || imask) { + if (dws->dwread(dws, DW_SPI_CTRL0) != cr0 || + cs_change || clk_div || imask) { spi_enable_chip(dws, 0); - dw_writew(dws, DW_SPI_CTRL0, cr0); + dws->dwwrite(dws, DW_SPI_CTRL0, cr0); spi_set_clk(dws, chip->clk_div); spi_chip_sel(dws, spi, 1); @@ -486,7 +487,7 @@ static void pump_transfers(unsigned long data) if (imask) spi_umask_intr(dws, imask); if (txlevel) - dw_writew(dws, DW_SPI_TXFLTR, txlevel); + dws->dwwrite(dws, DW_SPI_TXFLTR, txlevel); spi_enable_chip(dws, 1); } @@ -618,11 +619,11 @@ static void spi_hw_init(struct device *dev, struct dw_spi *dws) u32 fifo; for (fifo = 1; fifo < 256; fifo++) { - dw_writew(dws, DW_SPI_TXFLTR, fifo); - if (fifo != dw_readw(dws, DW_SPI_TXFLTR)) + dws->dwwrite(dws, DW_SPI_TXFLTR, fifo); + if (fifo != dws->dwread(dws, DW_SPI_TXFLTR)) break; } - dw_writew(dws, DW_SPI_TXFLTR, 0); + dws->dwwrite(dws, DW_SPI_TXFLTR, 0); dws->fifo_len = (fifo == 1) ? 0 : fifo; dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len); @@ -647,6 +648,11 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60); snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num); + if (!dws->dwread) + dws->dwread = dw_readw; + if (!dws->dwwrite) + dws->dwwrite = dw_writew; + ret = devm_request_irq(dev, dws->irq, dw_spi_irq, IRQF_SHARED, dws->name, dws); if (ret < 0) { diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 3d32be6..5ca2407 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -150,6 +150,8 @@ struct dw_spi { #ifdef CONFIG_DEBUG_FS struct dentry *debugfs; #endif + u32 (*dwread)(struct dw_spi *dws, u32 offset); + void (*dwwrite)(struct dw_spi *dws, u32 offset, u16 val); }; static inline u32 dw_readl(struct dw_spi *dws, u32 offset) @@ -157,14 +159,14 @@ static inline u32 dw_readl(struct dw_spi *dws, u32 offset) return __raw_readl(dws->regs + offset); } -static inline void dw_writel(struct dw_spi *dws, u32 offset, u32 val) +static inline void dw_writel(struct dw_spi *dws, u32 offset, u16 val) { - __raw_writel(val, dws->regs + offset); + __raw_writel((u32)val, dws->regs + offset); } -static inline u16 dw_readw(struct dw_spi *dws, u32 offset) +static inline u32 dw_readw(struct dw_spi *dws, u32 offset) { - return __raw_readw(dws->regs + offset); + return (u32)__raw_readw(dws->regs + offset); } static inline void dw_writew(struct dw_spi *dws, u32 offset, u16 val)