@@ -26,3 +26,16 @@ qspi: qspi@4b300000 {
spi-max-frequency = <25000000>;
ti,hwmods = "qspi";
};
+
+For dra7xx:
+qspi: qspi@4b300000 {
+ compatible = "ti,dra7xxx-qspi";
+ reg = <0x4b300000 0x100>, <0x4a002558 0x4>,
+ <0x5c000000 0x4000000>;
+ reg-names = "qspi_base", "qspi_ctrlmod",
+ "qspi_mmap";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <48000000>;
+ ti,hwmods = "qspi";
+};
@@ -1103,8 +1103,10 @@
qspi: qspi@4b300000 {
compatible = "ti,dra7xxx-qspi";
- reg = <0x4b300000 0x100>;
- reg-names = "qspi_base";
+ reg = <0x4b300000 0x100>, <0x4a002558 0x4>,
+ <0x5c000000 0x4000000>;
+ reg-names = "qspi_base", "qspi_ctrlmod",
+ "qspi_mmap";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "qspi";
Add qspi memory mapped region entries for DRA7xx based SoCs. Also, update the binding documents for the controller to document this change. Signed-off-by: Vignesh R <vigneshr@ti.com> --- Documentation/devicetree/bindings/spi/ti_qspi.txt | 13 +++++++++++++ arch/arm/boot/dts/dra7.dtsi | 6 ++++-- 2 files changed, 17 insertions(+), 2 deletions(-)