From patchwork Tue Dec 8 06:43:47 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anton Bondarenko X-Patchwork-Id: 7794781 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 9CF6ABEEE1 for ; Tue, 8 Dec 2015 06:45:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8C20C204E3 for ; Tue, 8 Dec 2015 06:45:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7BF5020462 for ; Tue, 8 Dec 2015 06:45:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932820AbbLHGoz (ORCPT ); Tue, 8 Dec 2015 01:44:55 -0500 Received: from mail-lb0-f171.google.com ([209.85.217.171]:34312 "EHLO mail-lb0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933148AbbLHGn7 (ORCPT ); Tue, 8 Dec 2015 01:43:59 -0500 Received: by lbbcs9 with SMTP id cs9so5579350lbb.1; Mon, 07 Dec 2015 22:43:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SAawn66e61JLkan+auKnoP15cl9il+UUx36ChsNABHE=; b=EetcUjnc6Z16rDnzhmLaZjbWMhj5FILvZY78cyJ+qfAcq7NyrwZl21lLJIuHxUzW5Z 9u/yYWpmz7t/Lm+cbd637EehGBISzUHgO5zjBskf6xI2uHrjlz5ENR4hoj3q7e43WxAr exSEtIKTTiOTui2DddQBeEaA764OLfUFiIbrMa4KevxTDqvxE6HaIPaSei14neAfcpHv juVc12bOifBX8CmafmXgLR6h9+Q8IgF+TmkQ3uny9ASbyie1UkzsTCUZGdlrIngykVdc WaoEwSjv8HCg2Hs+XjkfeygudoatHrXZ9ZXvhcC/nzny4kguEJhpipkzXnWY1SygIMv6 WO3w== X-Received: by 10.112.16.162 with SMTP id h2mr627501lbd.89.1449557037657; Mon, 07 Dec 2015 22:43:57 -0800 (PST) Received: from localhost.localdomain (c-89-233-200-205.cust.bredband2.com. [89.233.200.205]) by smtp.gmail.com with ESMTPSA id d2sm286875lbc.11.2015.12.07.22.43.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 07 Dec 2015 22:43:57 -0800 (PST) From: Anton Bondarenko To: broonie@kernel.org, b38343@freescale.com, s.hauer@pengutronix.de Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, vladimir_zapolskiy@mentor.com, jiada_wang@mentor.com Subject: [PATCH v6 5/8] spi: imx: allow only WML aligned transfers to use DMA Date: Tue, 8 Dec 2015 07:43:47 +0100 Message-Id: <1449557030-27525-6-git-send-email-anton.bondarenko.sama@gmail.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1449557030-27525-1-git-send-email-anton.bondarenko.sama@gmail.com> References: <1449557030-27525-1-git-send-email-anton.bondarenko.sama@gmail.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP RX DMA tail data handling doesn't work correctly in many cases with current implementation. It happens because SPI core was setup to generates both RX and RX TAIL events. And RX TAIL event does not work correctly. This can be easily verified by sending SPI transaction with size modulus WML(32 in our case) not equal 0. Also removing change introduced in f6ee9b582d2db652497b73c1f117591dfb6d3a90 since this change only fix usecases with transfer size from 33 to 128 bytes and doesn't fix 129 bytes and bigger. This is output from transaction with len 138 bytes in loopback mode at 10Mhz: TX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2 TX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75 TX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95 TX0030: 5f 3c 35 b5 c4 8c dd 6c 11 32 3d e2 b4 b4 59 cf TX0040: ce 23 3d 27 df a7 f9 96 fc 1e e0 66 2c 0e 7b 8c TX0050: ca 30 42 8f bc 9f 7b ce d1 b8 b1 87 ec 8a d6 bb TX0060: 2e 15 63 0e 3c dc a4 3a 7a 06 20 a7 93 1b 34 dd TX0070: 4c f5 ec 88 96 68 d6 68 a0 09 6f 8e 93 47 c9 41 TX0080: db ac cf 97 89 f3 51 05 79 71 RX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2 RX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75 RX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95 RX0030: 5f 3c 35 00 00 b5 00 00 00 c4 00 00 8c 00 00 dd RX0040: 6c 11 32 3d e2 b4 b4 59 cf ce 23 3d 27 df a7 f9 RX0050: 96 fc 1e e0 66 2c 0e 7b 8c ca 30 42 8f 1f 1f bc RX0060: 9f 7b ce d1 b8 b1 87 ec 8a d6 bb 2e 15 63 0e ed RX0070: ed 3c 58 58 58 dc 3d 3d a4 6a 6a 3a 52 52 7a 36 RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible if DMA RX read was triggered by RX event. This mean DMA was triggered by RX TAIL event. Signed-off-by: Anton Bondarenko --- drivers/spi/spi-imx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index d98c33c..50e0a79 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, { struct spi_imx_data *spi_imx = spi_master_get_devdata(master); - if (spi_imx->dma_is_inited && - transfer->len > spi_imx->wml * sizeof(u32)) + if (spi_imx->dma_is_inited && transfer->len >= spi_imx->wml && + (transfer->len % spi_imx->wml) == 0) return true; return false; }